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TMS320F28075: VDDIO short to GND

Part Number: TMS320F28075

Hi,

my customer has met several times VDDIO short to GND and would like to know if the fault would be caused by JTAG pin.

We are sure that the fault is not caused by the 3.3V power supply because 3.3V also have some other load and the other load is not broken.

We measured the bad device and find VDDIO is short to GND, but VDDA is good.

We also measured the JTAG pin, TMS is short to GND, TDO and TCK to GND resistance is half of good device.

I wonder are there any power supply to the JTAG pin when we connect emulator to USB on PC? 

Are there any special protection needed for JTAG pin?

  • my customer has met several times VDDIO short to GND and would like to know if the fault would be caused by JTAG pin.

    If your question is whether the JTAG debug probe could cause this, the answer is "may be", but I would say chances are something else is causing the damage.

    We are sure that the fault is not caused by the 3.3V power supply because 3.3V also have some other load and the other load is not broken.

    Fair assumption. By "other load", I presume you are referring to some other IC on the board. 

    We measured the bad device and find VDDIO is short to GND, but VDDA is good.

    Please look into whether VIH/VIL (or) IOH/IOL specs are violated for any GPIO pin. This is likely to cause Electrical Overstress (EOS) or Electrically Induced Physical Damage (EIPD)”. To summarize:

    1. Are any pins handled in violation of the VIH/VIL specifications? For example, is a 5v level signal fed into any input pin?
    2. Is the output buffer current rating violated for any output pin? For example, is any pin being forced to source more than 4 mA (or 8 mA, for certain pins)?
    3. Are there any pins that are driven before the device is fully powered up? i.e. the rails have reached their final steady-state value?
    I wonder are there any power supply to the JTAG pin when we connect emulator to USB on PC? 

    The JTAG debug probe drives (and receives) signals into/from the MCU. It does not deliver power. In Controlcards/Launchpads, the boars is indeed powered by the PC's USB port, I presume your post is about a customer design.

    Are there any special protection needed for JTAG pin?

    Any pin that is exposed to the outside world is vulnerable to EOS/ESD damage and may warrant some protection. The need needs to be assessed on a design-by-design basis.

    Please refer to this post

  • I wonder are there any power supply to the JTAG pin when we connect emulator to USB on PC? 

    The JTAG debug probe drives (and receives) signals into/from the MCU. It does not deliver power. In Controlcards/Launchpads, the boars is indeed powered by the PC's USB port, I presume your post is about a customer design.

    What I actually want to know is: if we plug emulator like XDS200 to USB on PC, and the 14PIN JTAG connector on XDS200 is not connected to the C2000 board, will any one of the 14 JTAG pins on the xds200 emulator be driven to like 3.3V or 5V?

  • What I actually want to know is: if we plug emulator like XDS200 to USB on PC, and the 14PIN JTAG connector on XDS200 is not connected to the C2000 board, will any one of the 14 JTAG pins on the xds200 emulator be driven to like 3.3V or 5V?

    The JTAG connector contains signals, which could be logic high or low. In that sense, yes, they could be driven to 3.3v.