Part Number: TMS320F28379D
Using the equation (vin/3.3*4095) << 4 to calculate the register value where the comparator will trip at a given vin, we have been unable to correctly predict the comparator trip time. When we apply a fixed voltage to the comparator input and set the ramp to decay below that value before the reset point, we get consistent comparator trip times but they do not match our calculations. There is a spreadsheet attached that shows our calculations. The comparator was set up with a ramp max of 9927, which corresponds to 0.5V, and a decrement value of 1000. We applied 0.36V which corresponds to a register value of 7149. We also set up a digitial filter with 10 samples, set to trip after 8/10 positive samples, with a clock prescaler of 1. We calculate that this should trip the comparator after 113.9ns, but in reality it trips after 176.8ns. The comparator was synchronized to PWM4, resetting at 1.4MHz. We are unsure why this discrepancy exists. The system clock was 200MHz and the PWM clock was 100MHz. This was observed on a TMS320F28379D eval card using CMPSS2. Code and the spreadsheet are attached. 
2654.minimal_working_example.zipCopy of Delfino_ramp_gen.xlsx
