I'm trying to learn how to work with I2C on 28379D processor and have some troubles. The problem is that transfer of the second portion of data does not start.
Here it the code:
// point A: start of the code
I2C_setDataCount(I2C_BASE, 2);
I2C_sendStopCondition(I2C_BASE);
I2C_sendStartCondition(I2C_BASE);
I2C_putData(I2C_BASE, 0xAC);
while((I2C_getInterruptStatus(I2C_BASE) & I2C_INT_RX_DATA_RDY) == 0); I2C_getData(I2C_BASE); // wait for byte transfer complete and read it back (see note below)
I2C_putData(I2C_BASE, 0x02);
while((I2C_getInterruptStatus(I2C_BASE) & I2C_INT_RX_DATA_RDY) == 0); I2C_getData(I2C_BASE);
//Wait for the I2CMDR.STP to be cleared
while(I2C_getStopConditionStatus(I2C_BASE));
//Wait for the Bus busy bit to be cleared
while(I2C_isBusBusy(I2C_BASE));
// point B: first portion of data is transfered
// attempt to send second portion of data
I2C_setDataCount(I2C_BASE, 1);
I2C_sendStopCondition(I2C_BASE);
I2C_sendStartCondition(I2C_BASE);
I2C_putData(I2C_BASE, 0xEE);
// point C: end of code
while(1);
Note. I don't use FIFOs and interrupts and due to absense of real I2C-slave use digital loopback mode. Therefore I monitor RRDY bit as a flag of byte transfer finish.
Before the start of the code (point A) I2C-B regs look like:
I2cbRegs I2C Registers
I2COAR 0x0048 I2C Own address [Memory Mapped]
I2CIER 0x0000 I2C Interrupt Enable [Memory Mapped]
I2CSTR 0x0410 I2C Status [Memory Mapped]
I2CCLKL 0x002D I2C Clock low-time divider [Memory Mapped]
I2CCLKH 0x002D I2C Clock high-time divider [Memory Mapped]
I2CCNT 0x0000 I2C Data count [Memory Mapped]
I2CDRR 0x0000 I2C Data receive [Memory Mapped]
I2CSAR 0x0048 I2C Slave address [Memory Mapped]
I2CDXR 0x0000 I2C Data Transmit [Memory Mapped]
I2CMDR 0x4660 I2C Mode [Memory Mapped]
I2CISRC 0x0000 I2C Interrupt Source [Memory Mapped]
I2CEMDR 0x0001 I2C Extended Mode [Memory Mapped]
I2CPSC 0x0013 I2C Prescaler [Memory Mapped]
I2CFFTX 0x0000 I2C FIFO Transmit [Memory Mapped]
I2CFFRX 0x0000 I2C FIFO Receive [Memory Mapped]
After the first portion of data is transfered I see it on logical analyzer as a sequecne of
Start, 0x90, 0xAC, 0x02, Stop
Right now everything looks OK.
Values of i2c-regs at this point:
I2cbRegs I2C Registers
I2COAR 0x0048 I2C Own address [Memory Mapped]
I2CIER 0x0000 I2C Interrupt Enable [Memory Mapped]
I2CSTR 0x0430 I2C Status [Memory Mapped]
I2CCLKL 0x002D I2C Clock low-time divider [Memory Mapped]
I2CCLKH 0x002D I2C Clock high-time divider [Memory Mapped]
I2CCNT 0x0002 I2C Data count [Memory Mapped]
I2CDRR 0x0002 I2C Data receive [Memory Mapped]
I2CSAR 0x0048 I2C Slave address [Memory Mapped]
I2CDXR 0x0002 I2C Data Transmit [Memory Mapped]
I2CMDR 0x4260 I2C Mode [Memory Mapped]
I2CISRC 0x0000 I2C Interrupt Source [Memory Mapped]
I2CEMDR 0x0001 I2C Extended Mode [Memory Mapped]
I2CPSC 0x0013 I2C Prescaler [Memory Mapped]
I2CFFTX 0x0000 I2C FIFO Transmit [Memory Mapped]
I2CFFRX 0x0000 I2C FIFO Receive [Memory Mapped]
But nothing happens at the second call to I2C_sendStartCondition(I2C_BASE); - no any impulse on SCL or SDA lines.
At the point C i2c-regs look like:
I2cbRegs I2C Registers
I2COAR 0x0048 I2C Own address [Memory Mapped]
I2CIER 0x0000 I2C Interrupt Enable [Memory Mapped]
I2CSTR 0x0420 I2C Status [Memory Mapped]
I2CCLKL 0x002D I2C Clock low-time divider [Memory Mapped]
I2CCLKH 0x002D I2C Clock high-time divider [Memory Mapped]
I2CCNT 0x0001 I2C Data count [Memory Mapped]
I2CDRR 0x0002 I2C Data receive [Memory Mapped]
I2CSAR 0x0048 I2C Slave address [Memory Mapped]
I2CDXR 0x00EE I2C Data Transmit [Memory Mapped]
I2CMDR 0x6A60 I2C Mode [Memory Mapped]
I2CISRC 0x0000 I2C Interrupt Source [Memory Mapped]
I2CEMDR 0x0001 I2C Extended Mode [Memory Mapped]
I2CPSC 0x0013 I2C Prescaler [Memory Mapped]
I2CFFTX 0x0000 I2C FIFO Transmit [Memory Mapped]
I2CFFRX 0x0000 I2C FIFO Receive [Memory Mapped]
As you can see MDR.STT is enabled but there is no transfer of any data.
I tried to use interrupts but still without success.
What do I wrong?
Regards,
Alex
