Part Number: TMS320F28388D
Hi all,
I am using the SPI in MasterMode, closed in loopback, 16 bits width, Tx and Rx FIFOs enabled.
When the application writes N words (with N < 16) into the tx FIFO (SPI_writeDataBlockingFIFO) and then, as soon as RXFFST is N, reads N times (SPI_readDataBlockingFIFO) from rx fifo (SPIRXBUF register), the data are correctly read in the same order as they were written, and every time a word is read from SPIRXBUF register, the RXFFST counter in SPIFFRX is also decremented as expected.
So, everything is fine, as described in the User Manual: "If FIFO mode is enabled, reading this register will also decrement the RXFFST counter in SPIFFRX."
But if I try to do the same with a Lauterbach script, this does not work. RXFFST counter reaches correctly N, but every later read from from SPIRXBUF register does not decrement the RXFFST counter, therefore only the first word is continuously read from SPIRXBUF. Reading SPIRXEMU has the same effect.
Please note that with Lauterbach, I also tried to configure the SPI in "Emulation Free Run" (FREE bit of SPIPRI register), but this does not help.
Any idea?