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TMS320F280025: INTOSC clock and external clock question

Part Number: TMS320F280025
Other Parts Discussed in Thread: C2000WARE, LAUNCHXL-F280025C

Hi

I have a problem on INTOSC clock and external clock. My project using INTOSC1 for WDT which configure to reset mode (cannot change it to interrupt mode due to customer requirement) and system clock is using external crystal.

I would like to use INTOSC2 as timer source to check system clock is correct or not. Any suggestion?

BR

HK Woo

  • Hi HK,

    Yes, the DCC counter is perfect for that scenario.  The DCC module takes two independent clock sources and using one as a reference, the counters can determine the rate of the other.  You can start with the C2000Ware DCC examples.  One particular example, dcc_ex3_continuous_monitoring_of_clock configures DCC inputs from INTOSC2, and the other from PLL but you can easily change that to SYSCLK.

    Regards,

    Joseph

  • Hi

    Thanks for your information. I will review the demo code. I missed 1 requirement as well. One requirement is to check any fault in interrupt generated within specific time interval. For example, main application has ISR running @ 100K and counter variable "X" will be increased by 1 as ISR is triggered. There is other function which uses to check the value of "X" in every 1ms. If X is not equal to 100 and hence MCU Interrupt HW has a problem.

    Actually, this requirement is IEC60730 requirement. Any suggestion?

    BR

    HK Woo

  • Hi HK,

    Check the CPU timers example in C2000Ware.  You should be able to configure 2 of the 3 timers and create ISR periods meeting the above requirements.

    Regards,

    Joseph 

  • Hi Joseph

    I have reviewed the code of suggested demo code. It seems that it monitors continually. I reviewed other example dcc_ex1_single_shot_verification. I think that it is more suitable for my application. I can run checking any time as I want. Just executes a function DCC_SingleShotClockVerify() if I want to do a checking. Please correct me wrong or not.

    Furthermore, I had several question on example dcc_ex1_single_shot_verification using LAUNCHXL-F280025C.

    1. codes inside while loop of function DCC_SingleShotClokVerify() never reaches as I use CCS debugger.

        while((DCC_getSingleShotStatus(base)| DCC_getErrorStatus(base)) == 0)
        {
            //
            // Turn On an LED to depict no flag is set.
            //
            GPIO_writePin(DEVICE_GPIO_PIN_LED1, 0);

            //
            // Delay for a bit.
            //
            DEVICE_DELAY_US(500000);

            //
            // Turn Off an LED to depict no flag is set.
            //
            GPIO_writePin(DEVICE_GPIO_PIN_LED1, 1);
        }

    Is it due to the process is very faster so that the code never reached.

    2. If I am going to check external crystal with INTOSC2 as reference. I just need to change parameters in DCC_SingleShotClockVerify() as below, is it correct?

    DCC_SingleShotClockVerify(DCC0_BASE,
                                          (DCC_Count0ClockSource)DCC_COUNT0SRC_INTOSC2,
                                          (DCC_Count1ClockSource)DCC_COUNT1SRC_SYSCLK,
                                           COUNT0, COUNT1, VALID);

    3. Regarding to COUNT0, COUNT1 and VALID calculation. I am using external crystal 20M and config running @ 100MHZ. Could you have advise how to calculate it. It is because the comment in example make me a little bit confused.

    //! The Dual-Clock Comparator Module 0 is used for the clock verification.
    //! The clocksource0 is the reference clock (Fclk0 = 20Mhz) and the
    //! clocksource1 is the clock that needs to be verified (Fclk1 = 100Mhz).
    //! Seed is the value that gets loaded into the Counter. The application
    //! programs the clock0 seed and clock1 seed to achieve a window of 50us.

    In my application, Fclk0 is 100Mhz (SYS_CLK =100Mhz, Using External crystal 20MHz)  and Fclk1 is 10Mhz (INTOSC2)

    By calculation base on the comments

    //
    // Calculating Counter0 & Valid Seed Value with +/-1.5 % tolerance (I change tolerance to 1.5 due specification of //SPRSP45B section 7.11.3.5.1.)
    //over recommended operating conditions
    // Total Error (in Cycles) = 10
    // Window (in Cycles) = (Total Error) / (0.01 * Tolerance) = 10 / 0.01 * 1.5 = 1500
    // Counter0 = Window - Total Error = 1000 - 10 = 990
    // Valid0 = 2 * Total Error = 2 * 10 = 20
    // Counter1 = Window * (Fclk1/Fclk0) = 1000 * ( 100/20) = 5000

    a. Window = 10 / 0.01 * Tolerance = 10/0.01 * 1.5 = 1500

    b. COUNT0 = Window - Total Error = 1500 - 10 = 1490

    c. Valid0 = 2 * Total Error = 2 * 10 = 20

    d. COUNT1 = Window * (10/1000) = 1000 * ( 10/100) = 100

    Is it correct?

    4. What is usage of COUNT0 and COUNT1?

    5. What is different between DCC0_BASE and DCC1_BASE? In my application, which DCC base should be used?

    Thanks

    HK Woo

  • Hi HK,

    Yes, you can use the single shot example.  I just stated to use the continuous example since that illustrates how to select INTOSC2 and PLL (which you can change to SYSCLK).  See comments corresponding to the items concerning you questions:

    1.) It is likely that that DCC is not getting the DONE flag set.  To verify this, set a breakpoint on the while statement and single-step to get you into the DCC_getSingleShotStatus() function.  Once inside the function, go to the register display window and expand the DCC STATUS register elements.  Look for the current value of DONE bit.  Not getting the STAUS DONE flag would indicate that counter and valid seeds may not be properly set.

    2.) It is probably better to reverse that.  Make external crystal as reference since these are more accurate and tuned compared to the internal oscillators, but yes, you can use the DCC single shot function for this purpose. 

    3.) Please see "Configuring DCC counters" section in TRM.  It discusses how to calculate the values for the counters.

    Regards,

    Joseph

  • Hi Joseph,

    #1. I tested it again. Please find below screen-shot for reference

    while((DCC_getSingleShotStatus(base)| DCC_getErrorStatus(base)) == 0). I supposed that DCC_getSingleShotStatus(base) returned value is 1 and DCC_getErrorStatus() returned value = 0

    and hence the code inside which loop should be reached but it is not.

    #2. It is UL safety requirement. It is necessary to check external crystal because our system clock.

    #3. I still have some confusing. In document below.

    a.There are different equations to calculate DCC/Total Error(In demo code name). Which equation should be used? In demo code, it is 10 but without any comment.

    b. What is Fsysclk?

    c.What are values should be used in fclk0 and fclk1? fclk0 = 10 and fclk1 = 100 or fclk0 = 10 and fclk1 = 20.

    I use below value in demo code.

    #define VALID   20
    #define COUNT0  990
    #define COUNT1  10000

    status = DCC_SingleShotClockVerify(DCC0_BASE,
                                          (DCC_Count0ClockSource)DCC_COUNT0SRC_INTOSC2,
                                          (DCC_Count1ClockSource)DCC_COUNT1SRC_SYSCLK,
                                           COUNT0, COUNT1, VALID);

    variable result is always 0 and hence is ok. If I change COUNT0 to 1490 as below... result = 1

    #define VALID   20
    #define COUNT0  1490
    #define COUNT1  15000

    The reason changes COUNT0 from 990 to 1490 because INTSOC2 tolerance +- 1.5 (MCU specification) and it was +-1.0

    Above parameter based on below comment

    //
    // Calculating Counter0 & Valid Seed Value with +/-1.5% tolerance
    // Total Error (in Cycles) = 10
    // Window (in Cycles) = (Total Error) / (0.01 * Tolerance) = 10 / 0.01 * 1 = 1000 ->  10 / 0.01 * 1.5 = 1500
    // Counter0 = Window - Total Error = 1000 - 10 = 990 -> 1500 - 10 = 1490
    // Valid0 = 2 * Total Error = 2 * 10 = 20
    // Counter1 = Window * (Fclk1/Fclk0) = 1500 * ( 100/10) = 5000 -> 15000

    Please advise what is the problem as COUNT0/1 change to 1490/15000

    BR

    HK Woo

  • Hi Woo,

    Are you using the latest code from C2000Ware, we have updated the function to include the calculations?

    Below is the code snippet from latest C2000Ware release (dcc_ex1_single_shot_verification.c):

      //
        // Verify the frequency of PLL clock using the XTAL as reference clock
        // FClk1 = PLL frequency = 100MHz
        // FClk0 = XTAL frequency = 20MHz
        // Tolerance = 1%
        // Allowable Frequency Tolerance = 0% (update as per the error in the XTAL frequency)
        // SysClk Freq = 200MHz
        //
        // Note: Update the parameters in case you are using different PLL or XTAL
        // frequencies,
        //
        status = DCC_verifyClockFrequency(DCC0_BASE,
                                          DCC_COUNT1SRC_PLL100.0F,
                                          DCC_COUNT0SRC_XTAL20.0F,
                                          1.0F0.0F100.0F);

    Fclk1 - Is the clock source for Counter1 of DCC

    Fclk0 - Is the clock source for Counter0 of DCC

    Fsysclk - Is the System Clock Frequency when you enable DCC. Meaning if you have configured PLL and using the high speed PLLCLK as the clock to the system, meaning your SYSCLK=100MHz, then use Fsysclk=100Mhz. If you have not enabled PLL or not using PLL clock to the system, then use OSCCLKSRC frequency, which if it INTOSC1/INTOSC2 Fsysclk=10MHz, or if OSCCLKSRC=XTAL, then Fsysclk = Crystal Frequency.

    Which equation to use depends on the frequency of Clock source configured for Counter0 and Counter1. In your case you are using Counter0 clock as INTOSC2 and Counter1 clock as SYSCLK, so I am assuming your OSCCLKSRC=XTAL, and you have not enabled the PLL to the system, so Fsysclk=Fclk1=Crystal Frequency=20MHz (assuming you are using 20Mhz Crystal).

    So in your case Fclk0=Frequency of INTOSC2=10Mhz, Fclk1=Frequency of SYSCLK = Frequency of External Crystal = 20MHz.

    If you go through the Technical Reference Manual, there are 2 types of tolerances:

    1. DCC Tolerance (Tolerance)

    Since both the counters Counter0 and Counter1 could run on two asynchronous clocks, starting and stopping of these counters will be asynchronous as well. This will lead to error in DCC measurement, as one counter may start/stop early then other counter. This error needs to be accounted while defining the window of measurement. Higher the window of measurement DCC error averages out to lower percentage. So you can define how much of DCC error you want to be the percentage of DCC window.

    2. Allowable Frequency Tolerance

    This depends on the clock that you are measuring or the clock you are using as reference. For eg. if INTOSC2 is used as a reference clock, its frequency can vary +/-1.5% which needs to be accounted as frequency error. So you need to pass that error in the function as well, so that VALID counter gets adjusted accordingly.

    Earlier version used constant values, without accounting for user desired tolerance and frequency error. So please update C2000Ware with the latest version.

    Best Regards,

    Nirav

  • Hi Joesph

    Thanks for your information. I am still confusing on fclk1. My application is running in 100MHz. Is it mean PLL is enabled and hence it should equal to 100. 
    I am new to TI MCU. Sorry about it

  • Hi HK,

    If PLL is enabled then Fclk1 = 100MHz.

    Regards,

    Joseph