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TMS320F28388D: About the shared memory

Part Number: TMS320F28388D


Hi. 

When using gsram, we know that user variables (flags) or IPC are used to process data write and read completion.

What I'm curious about is what happens if CPU1 with write permission is writing and CPU2, which is readable at the same time, tries to read?

Are there any other problems such as crashes other than reading data that has not been updated, that is, unexpected data?

In other words, what happens when CPU1 accesses the same memory as write and CPU2 reads at the same time?

  • Hi,

    What I'm curious about is what happens if CPU1 with write permission is writing and CPU2, which is readable at the same time, tries to read?

    Are there any other problems such as crashes other than reading data that has not been updated, that is, unexpected data?

    No unexpected data. Both access will get arbitrated as per Round Robin scheme which means order of write and read will depend on earlier access to same RAM block from CPU1 and CPU2. If CPU2 read access get priority then it'll read the previous data and then CPU1 write will happen.

    Regards,

    Vivek Singh