TMS320F28379D: SPI TX or RX Interrupt Setup to Fire After Every Transaction

Owen Roe

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Hello,

I have written a small little helper library that is supposed to cycle between four different sensors when triggered. The process is intended to go as follows:

User triggers the device to begin reading the sensors by calling order_read().
order_read() asserts the first device and clocks blank data (because only the MISO line is cared about).
The Tx or Rx interrupt is triggered at the end of the transaction. It deasserts the previous device, asserts the next device, and begins the transaction for the newly asserted sensor.
Repeat step 3 until all sensors have been read.

However, I can get neither the Tx nor the Rx interrupt to fire. I've tried the following combinations to trigger the ISR:

SPI_INT_RXFF interrupt to trigger on the SPI_FIFO_RX1 condition
SPI_INT_RX_DATA_TX_EMPTY
SPI_INT_TXFF interrupt to trigger on the SPI_FIFO_TXEMPTY condition

See the code below. I have included all of the different config combinations, but left them commented out. The code is currently configured to trigger the SPI_INT_TXFF interrupt on FIFO EMPTY.

#ifndef _MAG_SPI
#define _MAG_SPI

#include "device.h"
#include "driverlib.h"

#define MAG_SPI_BASE SPIC_BASE
#define MAG_SPI_BITRATE_HZ 500000
#define MAG_SPI_DATAWIDTH 16 


Mag(uint8_t cs_pin1, uint8_t cs_pin2, uint8_t cs_pin3, uint8_t cs_pin4);
void init();
void order_read();
float fetch_val(int8_t channel);

__interrupt void mag_spirx_isr(void);
__interrupt void mag_spitx_isr(void);


uint8_t cs_pins[4];
uint8_t cs_index = 0;
int16_t mag_vals[4];


void init(uint8_t cs_pin1, uint8_t cs_pin2, uint8_t cs_pin3, uint8_t cs_pin4)
{
	int i;
	
	cs_pins[0] = cs_pin1;
	cs_pins[1] = cs_pin2;
	cs_pins[2] = cs_pin3;
	cs_pins[3] = cs_pin4;

	for(i = 0; i < 4; i++)
	{
		GPIO_writePin(cs_pins[i], 1); // deassert all devices
	}

	// SPI Config
	SPI_disableModule(MAG_SPI_BASE);
	SPI_setConfig(MAG_SPI_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL1PHA1, SPI_MODE_MASTER, MAG_SPI_BITRATE_HZ, MAG_SPI_DATAWIDTH);

//	SPI_disableFIFO(MAG_SPI_BASE);

	SPI_enableFIFO(MAG_SPI_BASE);
	SPI_setFIFOInterruptLevel(MAG_SPI_BASE, SPI_FIFO_TXEMPTY, SPI_FIFO_RX1); // Interrupt on FIFO level (RX1, TX0)

//	SPI_clearInterruptStatus(MAG_SPI_BASE, SPI_INT_RX_DATA_TX_EMPTY);
//	SPI_clearInterruptStatus(MAG_SPI_BASE, SPI_INT_RXFF);
	SPI_clearInterruptStatus(MAG_SPI_BASE, SPI_INT_TXFF);

//	SPI_enableInterrupt(MAG_SPI_BASE, SPI_INT_RX_DATA_TX_EMPTY); // interrupt on rx fifo has data, tx is emptied
//	SPI_enableInterrupt(MAG_SPI_BASE, SPI_INT_RXFF);
	SPI_enableInterrupt(MAG_SPI_BASE, SPI_INT_RXFF);

//	Interrupt_register(INT_SPIA_RX, mag_spirx_isr);
	Interrupt_register(INT_SPIA_TX, mag_spitx_isr);

//	Interrupt_enable(INT_SPIA_RX);
	Interrupt_enable(INT_SPIA_TX);

	SPI_enableModule(MAG_SPI_BASE);

}

void order_read()
{
	cs_index = 0;

	GPIO_writePin(cs_pins[cs_index], 0);
	SPI_writeDataNonBlocking(MAG_SPI_BASE, 0x0000); // kick off SPI - ISR will cycle the rest at the appropriate time

}

float fetch_val(int8_t channel)
{
	return (float) mag_vals[channel]; // todo convert to float rotation
}


__interrupt void mag_spirx_isr(void) // will fire every time there is 1 in the rx fifo
{
    GPIO_writePin(cs_pins[cs_index], 1); // deassert previous channel

	mag_vals[cs_index] = SPI_readDataNonBlocking(MAG_SPI_BASE); // save value from previously dispatch tx/rx

	if(++cs_index < 4) // assert and tx/rx on next channel
	{
		GPIO_writePin(cs_pins[cs_index], 0); // assert next channel
		SPI_writeDataNonBlocking(MAG_SPI_BASE, 0x0000);
	}

	SPI_clearInterruptStatus(MAG_SPI_BASE, SPI_INT_RX_DATA_TX_EMPTY);
	SPI_clearInterruptStatus(MAG_SPI_BASE, SPI_INT_RXFF);
	Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
}

__interrupt void mag_spitx_isr(void) // will fire when the tx fifo is emptied
{
    GPIO_writePin(cs_pins[cs_index], 1); // deassert previous channel

    mag_vals[cs_index] = SPI_readDataNonBlocking(MAG_SPI_BASE); // save value from previously dispatch tx/rx

    if(++cs_index < 4) // assert and tx/rx on next channel
    {
        GPIO_writePin(cs_pins[cs_index], 0); // assert next channel
        SPI_writeDataNonBlocking(MAG_SPI_BASE, 0x0000);
    }

	SPI_clearInterruptStatus(SPIC_BASE, SPI_INT_TXFF);
	Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
}

#endif

Again, I am unable to observe that any of the interrupt service routines are running. A breakpoint set in the ISR is never hit, and the chip select lines that are supposed to be cycled are never switched. Any guidance as to what could be configured wrong here would be much appreciated.

Thanks,
Owen

over 4 years ago

0 Gus Martinez over 4 years ago

TI__Mastermind 27961 points

Hi Owen,

It could be that you are configuring SPIC, yet you are enabling interrupts for SPIA.

0 Owen Roe over 4 years ago in reply to Gus Martinez

Prodigy 60 points

Hi Gus,

Thanks for the response. Thanks for pointing out that typo with SPIA interrupt stuff. Unfortunately, the behavior is the same when everything is changed over to SPIC. Can you see anything else wrong with this? FWIW, this is running on CPU2 and I am delegating every pin to CPU2 using the three calls shown below (repeated for each of the CS pins, as well as the MOSI, MISO, and SCLK pins).

	GPIO_setPadConfig(MAG_SPI_MOSI, GPIO_PIN_TYPE_STD);
	GPIO_setPinConfig(MAG_SPI_MOSI_PIN_CFG);
	GPIO_setMasterCore(MAG_SPI_MOSI, MAG_CTRL_CORE);

+1 Gus Martinez over 4 years ago in reply to Owen Roe

TI__Mastermind 27961 points

Owen,

Some suggestions:

- Verify if there is activity in the SPI pins.

- Use CCS to view the SPI registers, make sure they are showing your desired configuration.

- Leverage an existing C2000ware example to get started.

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TMS320F28379D: SPI TX or RX Interrupt Setup to Fire After Every Transaction