TMS320F28388D: Detection and handling of non-regular floating-point values (+INF, -INF...) of variables (signals, parameters...) within C28x and CLA cores...

Dear TI experts

rather recently I asked you for advice related to the detection of non-regular floating-point values (+INF, -INF...) of variables (signals, parameters...):

TMS320F28335: Recommendation for the most efficient method (technique) to detect non-regular floating-point values (+INF, -INF...) of variables (signals, parameters etc.) - C2000 microcontrollers forum - C2000︎ microcontrollers - TI E2E support forums

and was instructed to use some resources (commands, status-flag registers...) documented in the TMS320C28x Extended Instruction Sets TRM (https://www.ti.com/lit/ug/spruhs1c/spruhs1c.pdf)   

Since, TMS320F28388D MCU features two C28x cores, I presume that same methods for detection/handling of non-regular floating-point values (mentioned for F28335 MCUs) can be applied here as well
(although the Extended Instruction Sets TRM document might be different).

However, TMS320F28388D features two additional CLA cores as well. In which way should we handle the problem of non-regular floating-point values which might appear during code execution in CLA cores? If there is no such CLA problem detected (so far), it would be nice to get an explicit confirmation related to this topic.

Are basic methods, depicted in the referenced documents, covering completely possible similar issues related to other number-crunching subsystems (VCU, FPU64...)?   

Best regards

Nenad