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TIDM-HV-1PH-DCAC: Want to Know more about the design

Part Number: TIDM-HV-1PH-DCAC
Other Parts Discussed in Thread: SFRA

Hi

Im studying the TIDM-HV-1PH-DCAC reference design. I have few questions about it. 


1. When using SFRA, it generates range of reference frequencies ant feed it ti the PWM. Then it measures the outputs via ADC and logs them to generate gain and phase plots.

So, my question is, when feeding that range of frequencies, wont there be a risk of resonance condition happens with the filter and system become unstable and leads to catastrophic failures?
Also i want to know do we want to use full input voltage to get the accurate analysis, or can we use lesser voltage like 60V to generate the plots and apply that  to predict behavior at 400V?

2.  Im new to these libraries hence very hard to understand the implementation of the controllers. Very little explanation about the controller implementation is in the design document.
There are lots of unclear information about the controller.  It just say it used feed-forward in the controller and no explanation further about it.  Please provide the explanation for use of feed-forward elements.
Also if possible, can you please give explanation about how the PR controllers implemented in DF22 structure. It will be really helpful.

3. There is no information about the running frrquencies/sample times of the inner current loops and the outer voltage loops.
Can you please provide better explanation for those parts.

4.
The image i attached here is a photo of nonlinear load response of the inverter. Is there any way to minimize these imperfections in the voltage loop, through tuning the controller.

best regars
Damith