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TMS320F2808: Intex hex file generated through C2000 hex utility is not aligned

Sirnivas N
Prodigy 60 points
Part Number: TMS320F2808
Other Parts Discussed in Thread: C2000WARE

I generated hex file from C2000 hex utility from CCS Version: 6.1.0.00104 IDE.The hex file is not aligned properly.I am sharing the file.Kindly,support on this.

Thanks,

Srinivas

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:19EEFE009E0001A68401FEA6060830BE06BD0006A48586FE0601C3FF064C
:00000001FF

  • 0
    TI__Expert 5630 points

    Hi Srinivas, 

    Can you share what command you used to generate this file? What is your expected output?

    Thanks,

    Anu

  • 0 in reply to Anu Biradar
    Prodigy 60 points

    Hi Anu,

        The expected output is as mentioned below.

    1.In line no.1 record type should be extended linear address record, whereas in the above file it is data record.

    2.In line no.1 should be shifted to line no.50 as it is the continuation address of the previous line no.49 

    3.If you observe line no.152 and line no.153.In line no.152 there are 32 bytes but in line no.153 it is 6 byes.So,I want line no.153 also to contain 20 bytes.

    There are similar non-aligned lines in the above if you observe.

    4.I also want to include checksum table for the whole image in the above file.

    5.How to get size of the hex image from the above file ?

    Note: Sector A and Sector B is used for custom bootloader application

    The command used to generate the intel hex file is below.

    The linker command file is below

    MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHD      : origin = 0x3E8000, length = 0x003FF0     /* on-chip FLASH */
   FLASHC      : origin = 0x3EC002, length = 0x003FFE     /* on-chip FLASH */
   //FLASHA      : origin = 0x3F4000, length = 0x003F7D     /* on-chip FLASH */
   //SWTAIL      : origin = 0x3F7F7D, length = 0x000003     /* on-chip FLASH */
   
   //CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   //BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   BEGIN       : origin = 0x3EC000, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */

   //CSM_PWL     : origin = 0x3EC002, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   
   ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */


PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
   //FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
   RAMH0       : origin = 0x3FA000, length = 0x002000     /* on-chip RAM block H0 */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{

   /* Allocate program areas: */
   .cinit              : > FLASHC      		PAGE = 0, ALIGN(2)
   .pinit              : > FLASHC,     		PAGE = 0, ALIGN(2)
   .text               : > FLASHC|FLASHD    PAGE = 0, ALIGN(2)


      /* The Flash API functions can be grouped together as shown below.
      The defined symbols _Flash28_API_LoadStart, _Flash28_API_LoadEnd
      and _Flash28_API_RunStart are used to copy the API functions out
      of flash memory and into SARAM */

   Flash28_API:
   {
        -lFlash2808_API_V302.lib(.econst)
        -lFlash2808_API_V302.lib(.text)
   }                   LOAD = FLASHD,
                       RUN = RAML0,
                       LOAD_START(_Flash28_API_LoadStart),
                       LOAD_END(_Flash28_API_LoadEnd),
                       RUN_START(_Flash28_API_RunStart),
                       PAGE = 0

   codestart           : > BEGIN       PAGE = 0, ALIGN(2)
   ramfuncs            : LOAD = FLASHD, 
                         RUN = RAML0, 
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   //csmpasswds          : > CSM_PWL     PAGE = 0
   //csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0       PAGE = 1
   .ebss               : > RAML1       PAGE = 1
   .esysmem            : > RAMH0       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHC      PAGE = 0, ALIGN(2)
   .switch             : > FLASHC      PAGE = 0, ALIGN(2)
   //.tail               : > SWTAIL,     PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASHD      PAGE = 0, ALIGN(2)                  /* Math Code */
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT, ALIGN(2)
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT, ALIGN(2)

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

    Thanks,

    Srinivas

  • 0 in reply to Sirnivas N
    TI__Expert 5630 points

    Hi Srinivas, 

    I will notify the hex utility expert to help you further. Please expect a response in a day or two. 

    Thanks, 

    Anu

  • 0 in reply to Sirnivas N
    TI__Guru**** 249900 points
    Sirnivas N said:
    In line no.1 record type should be extended linear address record, whereas in the above file it is data record.

    If the address of the first section converted is 0x8552, then no address record is required.

    As for some lines having less than 32 bytes ...  The hex utility works through the executable file one section at a time.  When one section completes processing, the current line is ended.  A new section always opens with a new line.  This occurs even if the two sections happen to be contiguous in memory.  This is not a violation of the specification for Intel hex format.

    Sirnivas N said:
    I also want to include checksum table for the whole image in the above file.

    The hex utility has no feature that solves this problem.  The closest thing is in the linker.  Please search the C28x compiler manual for the sub-chapter titled Linker-Generated CRC Tables and CRC Over Memory Ranges.

    Sirnivas N said:
    How to get size of the hex image from the above file ?

    Unfortunately, the hex utility has no feature which reports the size of the image.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Prodigy 60 points

    Hi George,

             Thanks for the response.

             All points above except point no.4 is not clear.As you mentioned I refereed chapter Linker-Generated CRC Tables and CRC Over Memory Ranges in spru513w  document.Now,I am able to generate Linker-Generated CRC Tables.

          For you kind information.

          Custom bootloader is running in Sectors A&B,which receives the application image over RS232 which should be flashed in Sectors C & D.

          1.How to verify the CRC of the received application which is flashed in Sectors C&D inside bootloader application?

          2.How to access linker generated CRC table of application inside bootloader?

      Thanks,

      SRINIVAS

  • 0 in reply to Sirnivas N
    TI__Mastermind 32585 points

    Hi Srinivas,

    For computing CRC at run time using VCRC module, you can refer to the C2000ware example.

    C2000Ware_3_04_00_00\libraries\dsp\VCU\c28\examples\crc

    The following thread also might be useful:

    https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1027144/tms320f280025-hw-crc-programming-or-code/3816452#3816452

    Regards,

    Veena

  • +1 in reply to Veena Kamath
    Prodigy 60 points

    Hi Veena Kamath,

            Thanks for quick response,

            The above two issues got resolved.

    1.How to verify the CRC of the received application which is flashed in Sectors C&D inside bootloader application?

        In the above document spru513w refered Example C-3. Checking CRC Values for CRC verify function.

    2.How to access linker generated CRC table of application inside bootloader?

       The linker generated CRC table which is available in the hex file is received from the host on the custom bootloader application.

    Thanks,

    Srinivas