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TMS320F28335: QS on DMA setting!

Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE

Hi:

The demo code I used is "C2000Ware_1_00_03_00\device_support\f2833x\examples\mcbsp_loopback_dma".  I just want to make sure:

1. The word size is 8-bit , I remeber that in Mcbsp SPI configuration, the word size could be 16-bit?

2.The init of DMA:

 //
    // Channel 1, McBSPA transmit
    //
    DmaRegs.CH1.BURST_SIZE.all = 0;		// 1 word/burst 
    DmaRegs.CH1.SRC_BURST_STEP = 0;		// no effect when using 1 word/burst 
    DmaRegs.CH1.DST_BURST_STEP = 0;		// no effect when using 1 word/burst

    //
    // Interrupt every frame (128 bursts/transfer)
    //
    DmaRegs.CH1.TRANSFER_SIZE = 127; 
    
    //
    // Move to next word in buffer after each word in a burst
    //
    DmaRegs.CH1.SRC_TRANSFER_STEP = 1; 
    
    DmaRegs.CH1.DST_TRANSFER_STEP = 0;	// Don't move destination address
    DmaRegs.CH1.SRC_ADDR_SHADOW = (Uint32) &sdata[0]; 
    
    //
    // Not needed unless using wrap function
    //
    DmaRegs.CH1.SRC_BEG_ADDR_SHADOW = (Uint32) &sdata[0];
    
    //
    // Start address = McBSPA DXR
    //
    DmaRegs.CH1.DST_ADDR_SHADOW = (Uint32) &McbspaRegs.DXR1.all; //目的地的首地址
    
    //
    // Not needed unless using wrap function
    //
    DmaRegs.CH1.DST_BEG_ADDR_SHADOW = (Uint32) &McbspaRegs.DXR1.all;

The  configuration here is "DmaRegs.CH1.SRC_BURST_STEP = 0;        // no effect when using 1 word/burst" .

In my mind, the source addr is this buffer "sdata". During the first  burst transmission, the sorce addr should be sdata[0], then next burst transmisson should be sdata[1]. In this case, I think CH1.SRC_BURST_STEP should be 1 but not 0.

The "DmaRegs.CH1.DST_BURST_STEP = 0;        // no effect when using 1 word/burst"  is fine I think beacuese the DST addr is always DXRx reg.

Whether it just 1 word per burst, the src addr would be increased automatically by default, so I do not need change SRC_BURST_STEP?