LAUNCHXL-F28379D: f28379d

I am everyone I have a question about the SPI on the F28379D in master mode and slave mode.

I have started to face issues with SPIA  RXBuffer on F28379D.

I am unable to receive the data.

anyone can help where is the mistake. 

/*
* main.c
*
* Created on: 28-Sep-2021
* Author: Devilal
*/

#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include "F28x_Project.h"
#include "F2837xD_device.h"
#include "F2837xD_Examples.h"

#include "device.h"
#include "driverlib.h"
#define EMPTY_LOOP
#define BUFFER_SIZE 128

void configGPIOs(void);
void initSPIBMaster(void);
void initSPIASlave(void);

__interrupt void spibTxFIFOISR(void);
__interrupt void spiaRxFIFOISR(void);

void SPI_TX_Byte(uint16_t a);
void spi_tx_strg_A(char *tx_str, uint16_t size);
void spi_tx_strg_B(char *tx_str, uint16_t size);

void error(void);
uint16_t sdata = 0;
char data[] ="Enter Data\r\n";

uint16_t rData[15]; // Receive data buffer
uint16_t rDataPoint = 0;

char rdataA[BUFFER_SIZE]; // Received data for SCI-A
Uint16 rdata_pointA; // Used for checking the received data
void main(void)
{
Device_init();
Device_initGPIO();
Interrupt_initModule(); // Initializes PIE and clears PIE registers. Disables CPU interrupts.
Interrupt_initVectorTable(); // Initializes the PIE vector table with pointers to the shell Interrupt Service Routines (ISR).

IER = 0x0000;
IFR = 0x0000;

Interrupt_register(INT_SPIB_TX, &spibTxFIFOISR);
Interrupt_register(INT_SPIA_RX, &spiaRxFIFOISR);

// Configure GPIOs for external loopback.
configGPIOs();
// Set up SPI B as master, initializing it for FIFO mode
initSPIBMaster();

// Set up SPI A as slave, initializing it for FIFO mode
initSPIASlave();

// Enable interrupts required for this example
Interrupt_enable(INT_SPIA_RX);
Interrupt_enable(INT_SPIB_TX);

Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
// EINT;
// ERTM;
while(1)
{
asm(" NOP");
// SPI_TX_Byte(sdata);
// sdata++;
// DEVICE_DELAY_US(10000);

}

}

void configGPIOs(void)
{

/*
* -External Connections:
* -GPIO58 and GPIO63 - SPI-MOSI
* -GPIO59 and GPIO64 - SPI-MISO
* -GPIO61 and GPIO65 - SPI-STE
* -GPIO60 and GPIO66 - SPI-CLK
*
*/

/* SPI-A configuration */
/* GPIO59 is the SPI-MISO. */
GPIO_setMasterCore(59, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_59_SPISOMIA);
GPIO_setPadConfig(59, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(59, GPIO_QUAL_ASYNC);

/* GPIO58 is the SPI-MOSI clock pin. */
GPIO_setMasterCore(58, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_58_SPISIMOA);
GPIO_setPadConfig(58, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(58, GPIO_QUAL_ASYNC);

/* GPIO61 is the SPI-STEA. */
GPIO_setMasterCore(61, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_61_SPISTEA);
GPIO_setPadConfig(61, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(61, GPIO_QUAL_ASYNC);

/* GPIO60 is the SPI-CLKA. */
GPIO_setMasterCore(60, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_60_SPICLKA);
GPIO_setPadConfig(60, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(60, GPIO_QUAL_ASYNC);

/* SPI-B configuration */
/* GPIO64 is the SPI-SOMIB. */
GPIO_setMasterCore(64, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_64_SPISOMIB);
GPIO_setPadConfig(64, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(64, GPIO_QUAL_ASYNC);

/* GPIO63 is the SPISIMOB clock pin. */
GPIO_setMasterCore(63, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_63_SPISIMOB);
GPIO_setPadConfig(63, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(63, GPIO_QUAL_ASYNC);

/* GPIO65 is the SPICLKB. */
GPIO_setMasterCore(65, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_65_SPICLKB);
GPIO_setPadConfig(65, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(65, GPIO_QUAL_ASYNC);

/* GPIO66 is the SPISTEB. */
GPIO_setMasterCore(66, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_66_SPISTEB);
GPIO_setPadConfig(66, GPIO_PIN_TYPE_PULLUP);
GPIO_setQualificationMode(66, GPIO_QUAL_ASYNC);
}

void initSPIBMaster(void)
{

// Must put SPI into reset before configuring it
SPI_disableModule(SPIB_BASE);

// SPI configuration. Use a 500kHz SPICLK and 16-bit word size.
SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ
,SPI_PROT_POL0PHA0 /* Clock polarity and phase*/
,SPI_MODE_MASTER /* Master */
,500000 /* Speed 250K */
,16); /* 16 bites data */
SPI_disableLoopback(SPIB_BASE);
SPI_setEmulationMode(SPIB_BASE, SPI_EMULATION_FREE_RUN);

// FIFO and interrupt configuration
SPI_enableFIFO(SPIB_BASE);
SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_TXFF);
SPI_setFIFOInterruptLevel(SPIB_BASE, SPI_FIFO_TX10, SPI_FIFO_RX10);
SPI_enableInterrupt(SPIB_BASE, SPI_INT_TXFF);

// Configuration complete. Enable the module.
SPI_enableModule(SPIB_BASE);
}

//
// Function to configure SPI A as slave with FIFO enabled.
//
void initSPIASlave(void)
{

// Must put SPI into reset before configuring it
SPI_disableModule(SPIA_BASE);

// SPI configuration. Use a 250kHz SPICLK and 16-bit word size.
SPI_setConfig(SPIA_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,
SPI_MODE_SLAVE, 500000, 16);
SPI_disableLoopback(SPIA_BASE);
SPI_setEmulationMode(SPIA_BASE, SPI_EMULATION_FREE_RUN);

// FIFO and interrupt configuration
SPI_enableFIFO(SPIA_BASE);
SPI_clearInterruptStatus(SPIA_BASE, SPI_INT_RXFF);
SPI_setFIFOInterruptLevel(SPIA_BASE, SPI_FIFO_TX10, SPI_FIFO_RX10);
SPI_enableInterrupt(SPIA_BASE, SPI_INT_RXFF);

// Configuration complete. Enable the module.
SPI_enableModule(SPIA_BASE);
}

//
// SPI A Transmit FIFO ISR
//
__interrupt void spibTxFIFOISR(void)
{
// SPI_TX_Byte(sdata);
spi_tx_strg_B(data, sizeof(data));
// Clear interrupt flag and issue ACK
SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_TXFF);
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
}

//
// SPI B Receive FIFO ISR
//
__interrupt void spiaRxFIFOISR(void)
{

while(SpiaRegs.SPIFFRX.bit.RXFFST != 0)
{
rData[rDataPoint] = SpiaRegs.SPIRXBUF;
rDataPoint++;
}
rDataPoint =0;
// Clear interrupt flag and issue ACK
SPI_clearInterruptStatus(SPIA_BASE, SPI_INT_RXFF);
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);

Example_PassCount++;
}

void error(void)
{
// asm(" ESTOP0"); //Test failed!! Stop!
for (;;);
}

void SPI_TX_Byte(uint16_t a)
{
if(SpiaRegs.SPIFFTX.bit.TXFFST < 16)
{
SpiaRegs.SPITXBUF = a;
}
}

void spi_tx_strg_A(char *tx_str, uint16_t size)
{
uint16_t ch;
uint16_t temp=0;
while(temp++<size)
{
ch = *tx_str;
SpiaRegs.SPITXBUF=ch;
if(SpiaRegs.SPIFFTX.bit.TXFFST < 16)
// while(SpiaRegs.SPIFFTX.bit.TXFFST < 16)
{
EMPTY_LOOP;
}
tx_str++;
}
}

void spi_tx_strg_B(char *tx_str, uint16_t size)
{
uint16_t ch;
uint16_t temp=0;
while(temp++<size)
{
ch = *tx_str;
SpibRegs.SPITXBUF=ch;
if(SpibRegs.SPIFFTX.bit.TXFFST < 16)
// while(SpiaRegs.SPIFFTX.bit.TXFFST == 0)
{
EMPTY_LOOP;
}
tx_str++;
}
}