Hi,
I am using DCL_PI_C4 function from the DCL libraries. DCL_PI_C4 is written in .asm file which we copied to our project. when we are using this function it is going into the ILLEGALISR
we have used Register level programming for F28379D controller
Please help us how to add .asm file and how to link to the .cmd file
finally our question is How to use DCL_PI_C4 function in our project using the .asm file.
please find the attachment of our project/****************************************************************************************************
*
* \file ADC.c
*
*----------------------------------------------------------------------------------------------------
* \brief Project: PSB Control Unit - FEC
* \brief This file contains all Function Definitions to Configure ADC and Measure the Analog signals.
*
* \brief Reference name for this file: "ADC"
* ----------------------------------------------------------------------------------------------------
* Version : 0.1
* Date : 10-Aug-2020
* Author : Jagadeesh & Avi Kumar
*-----------------------------------------------------------------------------------------------------
******************************************************************************************************/
/***********************
Included Files
************************/
#include "F28x_Project.h"
#include <stdint.h>
#include <math.h>
#include <float.h>
#include "main.h"
#include "sfra_f32.h"
//#include "sfra_gui_scicomms_driverlib.h"
#include "power_meas_sine_analyzer.h"
//#pragma FUNC_ALWAYS_INLINE(POWER_MEAS_SINE_ANALYZER_run)
int16_t PWM_Trip;
uint16_t duty1,duty2,duty3;
#define BIT_RESOLUTION 4095
#define SAMPLES 300
#define VIENNA_ADC_PU_SCALE_FACTOR ((float32_t)0.000244140625)
#define VIENNA_VDCBUS_MAX_SENSE_VOLTS ((float32_t)717.79)
#define VIENNA_V_MAX_SENSE_VOLTS ((float32_t)454)
#define VIENNA_VBUS_REF_SET_VOLTS ((float32_t)600)
#define VIENNA_I_MAX_SENSE_AMPS ((float32_t)12)
#define VIENNA_I_TRIP_LIMIT_AMPS ((float32_t)11)
#define VIENNA_VAC_TYPICAL_VOLTS ((float32_t)208)
#define ISR_FREQUENCY ((float32_t)10000)
#define EMAVG_MACRO(in, out) out = ((in - out) * (float32_t)0.000528) + out;
DCL_PI FEC_GV;
#define SFRA_F32_INJECT SFRA_F32_inject
extern struct cos_sin_matrix stCOS_SIN;
enum Modes_FEC eFEC_MODE; // FEC MODES
POWER_MEAS_SINE_ANALYZER sine_mains1, sine_mains2,sine_mains3;
volatile float32_t VA_VOLTAGE_RAW_DATA,VB_VOLTAGE_RAW_DATA,VC_VOLTAGE_RAW_DATA;
volatile float32_t IA_CURRENT,IB_CURRENT,IC_CURRENT;
volatile float32_t DC_48_VOLT,DC_400_VOLT;
volatile float32_t VA_Rms, VB_Rms, VC_Rms,PA_RMS,PB_RMS,PC_RMS;
volatile float32_t IA_Rms, IB_Rms, IC_Rms;
volatile float32_t iL1REF, iL2REF ,iL3REF ,iLREF, vRmsMeasAvg_pu;
float32_t Power_Factor_PA, Power_Factor_PB, Power_Factor_PC;
float32_t Frequency;
volatile float32_t Inductor_Voltage_Drop_FeedForward1,Inductor_Voltage_Drop_FeedForward2,Inductor_Voltage_Drop_FeedForward3;
volatile float32_t ThirdHarmonicInjection,FEC_duty1PU,FEC_duty2PU,FEC_duty3PU,gi_out1,gi_out2,gi_out3,BusHalfMeas_pu,BusRefSlewpu,VBus_Refpu;
int16_t closed_GiLoop,closed_GvLoop,FirstTime_GvLoop,NonLinearVolatageLoopFlag;
volatile float32_t VA_max_RAW_DATA,VB_max_RAW_DATA,VC_max_RAW_DATA;
volatile float32_t VA_Voltage,VB_Voltage,VC_Voltage,VBUS_PM_Voltage,VBUS_MN_Voltage,Vbus_Voltage,VBUS_PM_AVG__Voltage,VBUS_MN_AVG__Voltage,voltage_error_pu,Gv_Out;
#define GI_GAINKP ((float32_t)2.0000000000)
float32_t VBUS_AVG_DC,VBUS_DC_PM,VBUS_DC_MN,VBUS_DC;
float32_t d_Voltage,q_Voltage,d_Current,q_Current;
Uint32 g_u32WAIT_FLAG;
/************************************************************
ADC Group 'B' ISR
*************************************************************/
__interrupt void vi_adca1_isr(void)
{
if (PWM_Trip==1)
{
vPWM_OFF();
PWM_Trip=0;
closed_GiLoop = 1;
closed_GvLoop = 1;
}
PI_controller();
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT1)
{
AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
}
// vTHREE_PHASE_CURRENT_MEASUREMENT();
// if (eFEC_MODE == fec)
// {
// vCurrent_control();
// }
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
/************************************************************
ADC Group 'B' ISR
*************************************************************/
__interrupt void vi_adcb1_isr(void)
{
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
if(1 == AdcbRegs.ADCINTOVF.bit.ADCINT1)
{
AdcbRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
}
// vTHREE_PHASE_CURRENT_MEASUREMENT();
//
// if (eFEC_MODE == fec)
// {
// vCurrent_control();
// }
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
/*************************************************************
ADC Group 'A' ISR
**************************************************************/
__interrupt void vi_adcc1_isr(void)
{
// g_u32WAIT_FLAG ++;
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
if(1 == AdccRegs.ADCINTOVF.bit.ADCINT1)
{
AdccRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
/*************************************************************
ADC Group 'A' ISR
**************************************************************/
__interrupt void vi_adcd1_isr(void)
{
// g_u32WAIT_FLAG ++;
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
if(1 == AdcdRegs.ADCINTOVF.bit.ADCINT1)
{
AdcdRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
/*********************************************
ADC configurations.
* Power up ADC 'A' & 'B' Group.
* 12 bit Resolution.
* 8 - channels.
* Configure ePWM1 SOC and compare values.
* Setup ADC for ePWM1 Triggered Conversions.
**********************************************/
void ADC_init (void)
{
Uint16 acqps = 20;
EALLOW;
AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcbRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdccRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcdRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
AdcSetMode(ADC_ADCC, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
AdcSetMode(ADC_ADCD, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcdRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;
AdcdRegs.ADCCTL1.bit.ADCPWDNZ = 1;
// DELAY_US(1000);
EDIS;
// EPwm1Regs.ETSEL.bit.SOCAEN = 0; // Disable SOC on A group
// EPwm1Regs.ETSEL.bit.SOCASEL = 6; // Select SOC on up-count
// EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
// EPwm1Regs.CMPA.bit.CMPA = 1024; // Set compare A value to 2048 counts
// EPwm1Regs.TBPRD = 2048; // Set period to 4096 counts ----> 25kHz // change to 50khz i.e 2000
// EPwm1Regs.TBCTL.bit.CTRMODE = 3;
// EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;// freeze counter
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
EALLOW;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
// EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.ETSEL.bit.SOCAEN = 0;
EPwm1Regs.TBPRD = 1000; // Set timer period 801 TBCLKs Tpwm = 2 * TBPRD * TBCLK
EPwm1Regs.TBCTR = 0x0000; // Clear counter
EPwm1Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.SYNCOSEL = 1;
EPwm1Regs.CMPA.bit.CMPA = 000;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero
// EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.SHDWAFULL = 1;
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A,
EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CAU = AQ_SET; // Set PWM1B on event B, up
EPwm1Regs.AQCTLB.bit.CAD = AQ_CLEAR; // Clear PWM1B on event B, down count
EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
EPwm1Regs.ETSEL.bit.SOCASEL = 6;
EPwm1Regs.ETSEL.bit.INTSELCMP = 1;
EPwm1Regs.ETSEL.bit.INTEN = 1;
EPwm1Regs.ETSEL.bit.INTSEL = 5;
EPwm1Regs.CMPB.bit.CMPB = 815;
// EPwm1Regs.ETPS.bit.SOCAPRD = 1;
EPwm1Regs.ETPS.bit.INTPSSEL = 1;
EPwm1Regs.ETPS.bit.SOCPSSEL = 1;
EPwm1Regs.ETFLG.bit.SOCA = 1;
EPwm1Regs.ETINTPS.bit.INTPRD2 = 1;
EPwm1Regs.ETSOCPS.bit.SOCAPRD2 = 1;
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EPwm1Regs.ETSEL.bit.SOCAEN = 1;
//**************************************************************************
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
// EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm2Regs.ETSEL.bit.SOCAEN = 0;
EPwm2Regs.TBPRD = 1000; // Set timer period 801 TBCLKs Tpwm = 2 * TBPRD * TBCLK
EPwm2Regs.TBCTR = 0x0000; // Clear counter
EPwm2Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm2Regs.TBCTL.bit.SYNCOSEL = 1;
EPwm2Regs.CMPA.bit.CMPA = 000;
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero
// EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.SHDWAFULL = 1;
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A,
EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
EPwm2Regs.AQCTLB.bit.CAU = AQ_SET; // Set PWM1B on event B, up
EPwm2Regs.AQCTLB.bit.CAD = AQ_CLEAR; // Clear PWM1B on event B, down count
EPwm2Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
EPwm2Regs.ETSEL.bit.INTSELCMP = 1;
EPwm2Regs.ETSEL.bit.INTEN = 1;
EPwm2Regs.ETSEL.bit.INTSEL = 5;
EPwm2Regs.CMPB.bit.CMPB = 815;
// EPwm1Regs.ETPS.bit.SOCAPRD = 1;
EPwm2Regs.ETPS.bit.INTPSSEL = 1;
EPwm2Regs.ETPS.bit.SOCPSSEL = 1;
EPwm2Regs.ETFLG.bit.SOCA = 1;
EPwm2Regs.ETINTPS.bit.INTPRD2 = 1;
EPwm2Regs.ETSOCPS.bit.SOCAPRD2 = 1;
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EPwm2Regs.ETSEL.bit.SOCAEN = 1;
//*****************************************************
//**************************************************************************
EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
// EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm3Regs.ETSEL.bit.SOCAEN = 0;
EPwm3Regs.TBPRD = 1000; // Set timer period 801 TBCLKs Tpwm = 2 * TBPRD * TBCLK
EPwm3Regs.TBCTR = 0x0000; // Clear counter
EPwm3Regs.TBPHS.bit.TBPHS = 0x0000; // Phase is 0
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm3Regs.TBCTL.bit.SYNCOSEL = 1;
EPwm3Regs.CMPA.bit.CMPA = 000;
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero
// EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
EPwm3Regs.CMPCTL.bit.SHDWAFULL = 1;
EPwm3Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A,
EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR;
EPwm3Regs.AQCTLB.bit.CAU = AQ_SET; // Set PWM1B on event B, up
EPwm3Regs.AQCTLB.bit.CAD = AQ_CLEAR; // Clear PWM1B on event B, down count
EPwm3Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
EPwm3Regs.ETSEL.bit.INTSELCMP = 1;
EPwm3Regs.ETSEL.bit.INTEN = 1;
EPwm3Regs.ETSEL.bit.INTSEL = 5;
EPwm3Regs.CMPB.bit.CMPB = 815;
// EPwm1Regs.ETPS.bit.SOCAPRD = 1;
EPwm3Regs.ETPS.bit.INTPSSEL = 1;
EPwm3Regs.ETPS.bit.SOCPSSEL = 1;
EPwm3Regs.ETFLG.bit.SOCA = 1;
EPwm3Regs.ETINTPS.bit.INTPRD2 = 1;
EPwm3Regs.ETSOCPS.bit.SOCAPRD2 = 1;
EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EPwm3Regs.ETSEL.bit.SOCAEN = 1;
//*****************************************************
EDIS;
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
EALLOW;
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 2; //SOC0 will convert pin B2
AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC3CTL.bit.CHSEL = 2; //SOC0 will convert pin B2
AdcaRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC3CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC6CTL.bit.CHSEL = 2; //SOC0 will convert pin B2
AdcaRegs.ADCSOC6CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC6CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC9CTL.bit.CHSEL = 2; //SOC0 will convert pin B2
AdcaRegs.ADCSOC9CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC9CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC1CTL.bit.CHSEL = 4; //SOC0 will convert pin B3
AdcaRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC4CTL.bit.CHSEL = 4; //SOC0 will convert pin B3
AdcaRegs.ADCSOC4CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC4CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC7CTL.bit.CHSEL = 4; //SOC0 will convert pin B3
AdcaRegs.ADCSOC7CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC7CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC10CTL.bit.CHSEL = 4; //SOC0 will convert pin B3
AdcaRegs.ADCSOC10CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC10CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC2CTL.bit.CHSEL = 14; //SOC0 will convert pin B4
AdcaRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC5CTL.bit.CHSEL = 14; //SOC0 will convert pin B4
AdcaRegs.ADCSOC5CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC5CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC8CTL.bit.CHSEL = 14; //SOC0 will convert pin B4
AdcaRegs.ADCSOC8CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC8CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCSOC11CTL.bit.CHSEL = 14; //SOC0 will convert pin B4
AdcaRegs.ADCSOC11CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC11CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 2; //SOC0 will convert pin B5
AdcbRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcbRegs.ADCSOC1CTL.bit.CHSEL = 2; //SOC0 will convert pin B5
AdcbRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcbRegs.ADCSOC2CTL.bit.CHSEL = 2; //SOC0 will convert pin B5
AdcbRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcbRegs.ADCSOC3CTL.bit.CHSEL = 2; //SOC0 will convert pin B5
AdcbRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcbRegs.ADCSOC3CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC0CTL.bit.CHSEL = 0; //SOC0 will convert pin A1
AdcdRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC0CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC2CTL.bit.CHSEL = 0; //SOC0 will convert pin A1
AdcdRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC2CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC4CTL.bit.CHSEL = 0; //SOC0 will convert pin A1
AdcdRegs.ADCSOC4CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC4CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC6CTL.bit.CHSEL = 0; //SOC0 will convert pin A1
AdcdRegs.ADCSOC6CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC6CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC1CTL.bit.CHSEL = 2; //SOC0 will convert pin A2
AdcdRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC1CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC3CTL.bit.CHSEL = 2; //SOC0 will convert pin A3
AdcdRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC3CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC5CTL.bit.CHSEL = 2; //SOC0 will convert pin A3
AdcdRegs.ADCSOC5CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC5CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcdRegs.ADCSOC7CTL.bit.CHSEL = 2; //SOC0 will convert pin A3
AdcdRegs.ADCSOC7CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcdRegs.ADCSOC7CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC0CTL.bit.CHSEL = 2; //SOC0 will convert pin A3
AdccRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC0CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC2CTL.bit.CHSEL = 2; //SOC0 will convert pin A3
AdccRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC2CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC4CTL.bit.CHSEL = 2; //SOC0 will convert pin A3
AdccRegs.ADCSOC4CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC4CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC6CTL.bit.CHSEL = 2; //SOC0 will convert pin A3
AdccRegs.ADCSOC6CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC6CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC1CTL.bit.CHSEL = 4; //SOC0 will convert pin A3
AdccRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC1CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC3CTL.bit.CHSEL = 4; //SOC0 will convert pin A3
AdccRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC3CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC5CTL.bit.CHSEL = 4; //SOC0 will convert pin A3
AdccRegs.ADCSOC5CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC5CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdccRegs.ADCSOC7CTL.bit.CHSEL = 4; //SOC0 will convert pin A3
AdccRegs.ADCSOC7CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdccRegs.ADCSOC7CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
AdcdRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
EDIS;
IER |= M_INT1; //Enable group 1 interrupts
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
// EALLOW;
// CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
//
// EPwm1Regs.ETSEL.bit.SOCAEN = 1; //enable SOCA
// EPwm1Regs.TBCTL.bit.CTRMODE = 2; //unfreeze, and enter up count mode
// EDIS;
POWER_MEAS_SINE_ANALYZER_reset(&sine_mains1);
POWER_MEAS_SINE_ANALYZER_config(&sine_mains1,
(float32_t)ISR_FREQUENCY,
(float32_t)0.08,
(float32_t)110,
(float32_t)40);
POWER_MEAS_SINE_ANALYZER_reset(&sine_mains2);
POWER_MEAS_SINE_ANALYZER_config(&sine_mains2,
(float32_t)ISR_FREQUENCY,
(float32_t)0.08,
(float32_t)110,
(float32_t)40);
POWER_MEAS_SINE_ANALYZER_reset(&sine_mains3);
POWER_MEAS_SINE_ANALYZER_config(&sine_mains3,
(float32_t)ISR_FREQUENCY,
(float32_t)0.08,
(float32_t)110,
(float32_t)40);
IA_CURRENT = 0; IB_CURRENT = 0; IC_CURRENT = 0;
VA_Voltage = 0; VB_Voltage = 0; VC_Voltage = 0;
VBUS_PM_Voltage = 0; VBUS_MN_Voltage = 0;
iLREF = 0.05f;BusRefSlewpu = 0.0f ;VBus_Refpu = 0 ;
FirstTime_GvLoop = 1;voltage_error_pu = 0;NonLinearVolatageLoopFlag = 0;
VBus_Refpu = VIENNA_VBUS_REF_SET_VOLTS / VIENNA_V_MAX_SENSE_VOLTS;
}
/*****************************************************************************
* This function Updates the PWM Duty Cycle according to 3-Phase Values.
******************************************************************************/
void vUpdate_PWM_Duty_Cycle()
{
// float32_t pwm_period;
// pwm_period = 1000;
duty1 = (uint16_t) ((float32_t)1000 * (float32_t) fabsf(FEC_duty1PU));
duty2 = (uint16_t) ((float32_t)1000 * (float32_t) fabsf(FEC_duty2PU));
duty3 = (uint16_t) ((float32_t)1000 * (float32_t) fabsf(FEC_duty3PU));
/****************Compare Values***********************/
if(duty1>500 || duty2>500 || duty3>500 )
{
vPWM_OFF();
}
else
{
EPwm1Regs.CMPA.bit.CMPA = duty1;
EPwm2Regs.CMPA.bit.CMPA = duty2;
EPwm3Regs.CMPA.bit.CMPA = duty3;
}
}
void SINE_ANALYZER(void)
{
if(closed_GvLoop == 1)
{
if(fabsf(VBus_Refpu - BusRefSlewpu) > 0.1f)
{
if(VBus_Refpu > BusRefSlewpu)
{
BusRefSlewpu = BusRefSlewpu + 0.0001f;
}
else
{
BusRefSlewpu = BusRefSlewpu - 0.0001f;
}
}
else if(fabsf(VBus_Refpu - BusRefSlewpu) > 0.01f)
{
if(VBus_Refpu > BusRefSlewpu)
{
BusRefSlewpu = BusRefSlewpu + 0.00005f;
}
else
{
BusRefSlewpu = BusRefSlewpu - 0.00005f;
}
}
else if(fabsf(VBus_Refpu - BusRefSlewpu) > 0.005f)
{
if(VBus_Refpu > BusRefSlewpu)
{
BusRefSlewpu = BusRefSlewpu + 0.00001f;
}
else
{
BusRefSlewpu = BusRefSlewpu - 0.00001f;
}
}
else
{
BusRefSlewpu = VBus_Refpu;
}
}
IA_CURRENT = (((float32_t)(AdcaResultRegs.ADCRESULT0 + AdcaResultRegs.ADCRESULT3 + AdcaResultRegs.ADCRESULT6 + AdcaResultRegs.ADCRESULT9))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f - 0.552f) * 2.0f ;
IB_CURRENT = (((float32_t)(AdcaResultRegs.ADCRESULT1 + AdcaResultRegs.ADCRESULT4 + AdcaResultRegs.ADCRESULT7 + AdcaResultRegs.ADCRESULT10))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f - 0.552f) * 2.0f ;
IC_CURRENT = (((float32_t)(AdcaResultRegs.ADCRESULT2 + AdcaResultRegs.ADCRESULT5 + AdcaResultRegs.ADCRESULT8 + AdcaResultRegs.ADCRESULT11))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f - 0.552f) * 2.0f ;
VA_Voltage = (((float32_t)(AdcbResultRegs.ADCRESULT0 + AdcbResultRegs.ADCRESULT1 + AdcbResultRegs.ADCRESULT2 + AdcbResultRegs.ADCRESULT3))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f - 0.552f) * 2.0f ;
// VA_Voltage = (((VA_Voltage / 0.58928571) - 1.5) / 8.2) * 834.33;
VB_Voltage = (((float32_t)(AdcdResultRegs.ADCRESULT0 + AdcdResultRegs.ADCRESULT2 + AdcdResultRegs.ADCRESULT4 + AdcdResultRegs.ADCRESULT6))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f - 0.552f) * 2.0f ;
// VB_Voltage = (((VB_Voltage / 0.58928571) - 1.5) / 8.2) * 834.33;
VC_Voltage = (((float32_t)(AdcdResultRegs.ADCRESULT1 + AdcdResultRegs.ADCRESULT3 + AdcdResultRegs.ADCRESULT5 + AdcdResultRegs.ADCRESULT7))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f - 0.552f) * 2.0f ;
// VC_Voltage = (((VC_Voltage / 0.58928571) - 1.5) / 8.2) * 834.33;
sine_mains1.i = IA_CURRENT;
sine_mains1.v = VA_Voltage;
POWER_MEAS_SINE_ANALYZER_run(&sine_mains1);
sine_mains2.i = IB_CURRENT;
sine_mains2.v = VB_Voltage;
POWER_MEAS_SINE_ANALYZER_run(&sine_mains2);
sine_mains3.i = IC_CURRENT;
sine_mains3.v = VC_Voltage;
POWER_MEAS_SINE_ANALYZER_run(&sine_mains3);
EMAVG_MACRO(sine_mains1.vRms, vRmsMeasAvg_pu);
VA_Rms = sine_mains1.vRms * VIENNA_V_MAX_SENSE_VOLTS;
IA_Rms = sine_mains1.iRms * VIENNA_I_MAX_SENSE_AMPS;
PA_RMS = sine_mains1.pRms * VIENNA_V_MAX_SENSE_VOLTS * VIENNA_I_MAX_SENSE_AMPS;
Power_Factor_PA = sine_mains1.powerFactor;
VB_Rms = sine_mains2.vRms * VIENNA_V_MAX_SENSE_VOLTS;
IB_Rms = sine_mains2.iRms * VIENNA_I_MAX_SENSE_AMPS;
PB_RMS = sine_mains2.pRms * VIENNA_V_MAX_SENSE_VOLTS * VIENNA_I_MAX_SENSE_AMPS;
Power_Factor_PB = sine_mains2.powerFactor;
VC_Rms = sine_mains3.vRms * VIENNA_V_MAX_SENSE_VOLTS;
IC_Rms = sine_mains3.iRms * VIENNA_I_MAX_SENSE_AMPS;
PC_RMS = sine_mains3.pRms * VIENNA_V_MAX_SENSE_VOLTS * VIENNA_I_MAX_SENSE_AMPS;
Power_Factor_PC = sine_mains3.powerFactor;
Frequency = sine_mains1.acFreqAvg;
VBUS_PM_Voltage = (((float32_t)(AdccResultRegs.ADCRESULT0 + AdccResultRegs.ADCRESULT2 + AdccResultRegs.ADCRESULT4 + AdccResultRegs.ADCRESULT6))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f ) * VIENNA_VDCBUS_MAX_SENSE_VOLTS / VIENNA_V_MAX_SENSE_VOLTS;
VBUS_PM_Voltage = (0.974952f * VBUS_PM_Voltage) + 0.0002906f;
VBUS_MN_Voltage = (((float32_t)(AdccResultRegs.ADCRESULT1 + AdccResultRegs.ADCRESULT3 + AdccResultRegs.ADCRESULT5 + AdccResultRegs.ADCRESULT7))
* VIENNA_ADC_PU_SCALE_FACTOR * 0.25f ) * VIENNA_VDCBUS_MAX_SENSE_VOLTS / VIENNA_V_MAX_SENSE_VOLTS;
VBUS_MN_Voltage = (0.9770874f * VBUS_MN_Voltage) + 0.00329920f;
Vbus_Voltage = VBUS_PM_Voltage + VBUS_MN_Voltage;
BusHalfMeas_pu = (Vbus_Voltage) * 0.5f;
BusHalfMeas_pu = (BusHalfMeas_pu < 0.2f)?0.2f:BusHalfMeas_pu;
EMAVG_MACRO(VBUS_PM_Voltage,VBUS_PM_AVG__Voltage);
EMAVG_MACRO(VBUS_MN_Voltage,VBUS_MN_AVG__Voltage);
VBUS_AVG_DC = VBUS_PM_AVG__Voltage + VBUS_MN_AVG__Voltage;
VBUS_DC_PM = VBUS_PM_AVG__Voltage * VIENNA_V_MAX_SENSE_VOLTS;
VBUS_DC_MN = VBUS_MN_AVG__Voltage * VIENNA_V_MAX_SENSE_VOLTS;
VBUS_DC = VBUS_DC_PM + VBUS_DC_MN;
// q_Current = (float)0.6667*(IA_Rms*stCOS_SIN.cs + IB_Rms*stCOS_SIN.csn + IC_Rms*stCOS_SIN.csp);
// d_Current = -(float)0.6667*(IA_Rms*stCOS_SIN.sn + IB_Rms*stCOS_SIN.snn + IC_Rms*stCOS_SIN.snp);
//
// q_Voltage = ((float)0.6667) * ((VA_Rms * stCOS_SIN.cs) + (VB_Rms * stCOS_SIN.csn) + (VC_Rms * stCOS_SIN.csp));
// d_Voltage = -((float)0.6667) * ((VA_Rms * stCOS_SIN.sn) + (VB_Rms * stCOS_SIN.snn) + (VC_Rms * stCOS_SIN.snp));
}
void PI_controller(void)
{
iL1REF = iLREF * (VA_Voltage / vRmsMeasAvg_pu);
iL2REF = iLREF * (VB_Voltage / vRmsMeasAvg_pu);
iL3REF = iLREF * (VC_Voltage / vRmsMeasAvg_pu);
Inductor_Voltage_Drop_FeedForward1 = 0;
Inductor_Voltage_Drop_FeedForward2 = 0;
Inductor_Voltage_Drop_FeedForward3 = 0;
ThirdHarmonicInjection = 0;
if(closed_GiLoop == 1)
{
gi_out1 = (IA_CURRENT - iL1REF) * GI_GAINKP;
gi_out2 = (IB_CURRENT - iL2REF) * GI_GAINKP;
gi_out3 = (IC_CURRENT - iL3REF) * GI_GAINKP;
FEC_duty1PU = ( (gi_out1
+ Inductor_Voltage_Drop_FeedForward1
+ VA_Voltage
- ThirdHarmonicInjection
) / BusHalfMeas_pu );
FEC_duty2PU = ( (gi_out2
+ Inductor_Voltage_Drop_FeedForward2
+ VB_Voltage
- ThirdHarmonicInjection
) / BusHalfMeas_pu );
FEC_duty3PU = ( (gi_out3
+ Inductor_Voltage_Drop_FeedForward3
+ VC_Voltage
- ThirdHarmonicInjection
) / BusHalfMeas_pu );
}
else
{
FEC_duty1PU = 0.0f;
FEC_duty2PU = 0.0f;
FEC_duty3PU = 0.0f;
}
FEC_duty1PU = (FEC_duty1PU > 1.0f)?1.0f:FEC_duty1PU;
FEC_duty1PU = (FEC_duty1PU < -1.0f)?-1.0f:FEC_duty1PU;
FEC_duty2PU = (FEC_duty2PU > 1.0f)?1.0f:FEC_duty1PU;
FEC_duty2PU = (FEC_duty2PU < -1.0f)?-1.0f:FEC_duty1PU;
FEC_duty3PU = (FEC_duty3PU > 1.0f)?1.0f:FEC_duty1PU;
FEC_duty3PU = (FEC_duty3PU < -1.0f)?-1.0f:FEC_duty1PU;
vUpdate_PWM_Duty_Cycle();
if(closed_GvLoop == 1)
{
if(FirstTime_GvLoop == 1)
{
BusRefSlewpu = Vbus_Voltage ;
FirstTime_GvLoop = 0;
}
voltage_error_pu = fabs(BusRefSlewpu - Vbus_Voltage);
if(NonLinearVolatageLoopFlag == 0)
{
FEC_GV.Kp = ((float32_t)0.3999748673) ;
FEC_GV.Ki = ((float32_t)0.0001256716) ;
}
else
{
if(voltage_error_pu > 0.005f)
{
if(FEC_GV.Kp < ((float32_t)5.0f * (float32_t)0.3999748673))
{
FEC_GV.Kp = FEC_GV.Kp + 0.05f;
}
}
else if(voltage_error_pu < 0.01f)
{
if(FEC_GV.Kp > (float32_t)0.3999748673)
{
FEC_GV.Kp = FEC_GV.Kp - 0.05f;
}
}
}
Gv_Out = DCL_runPI_C4(&FEC_GV,BusRefSlewpu,Vbus_Voltage);
iLREF = Gv_Out * (VBUS_AVG_DC / (3 *vRmsMeasAvg_pu));
}
}
/***************************************************************************
3 PHASE CURRENTS are measured and converted into dq Transformation currents
ADC CHANNEL ---> B3 - IA_CURRENT // Stored in ADC B Result buffer 1
ADC CHANNEL ---> B5 - IB_CURRENT // Stored in ADC B Result buffer 3
ADC CHANNEL ---> B4 - IC_CURRENT // Stored in ADC B Result buffer 2
****************************************************************************/
void vTHREE_PHASE_CURRENT_MEASUREMENT(void)
{
IA_CURRENT = (AdcbResultRegs.ADCRESULT1 * 3)/BIT_RESOLUTION;
IB_CURRENT = (AdcbResultRegs.ADCRESULT3 * 3)/BIT_RESOLUTION;
IC_CURRENT = (AdcbResultRegs.ADCRESULT2 * 3)/BIT_RESOLUTION;
q_Current = (float)0.6667*(IA_CURRENT*stCOS_SIN.cs + IB_CURRENT*stCOS_SIN.csn + IC_CURRENT*stCOS_SIN.csp);
d_Current = -(float)0.6667*(IA_CURRENT*stCOS_SIN.sn + IB_CURRENT*stCOS_SIN.snn + IC_CURRENT*stCOS_SIN.snp);
}
/***************************************************************************
3 PHASE VOLTAGES are measured and converted into dq Transformation voltages
ADC CHANNEL ---> A1 - VA_VOLTAGE // Stored in ADC A Result buffer 1
ADC CHANNEL ---> A3 - VB_VOLTAGE // Stored in ADC A Result buffer 3
ADC CHANNEL ---> A2 - VC_VOLTAGE // Stored in ADC A Result buffer 2
* Taking Vpeak value for every 200 samples in each phase
****************************************************************************/
void vTHREE_PHASE_VOLTAGE_MEASUREMENT(void)
{
int i = 0;
VA_max_RAW_DATA = 0;
VB_max_RAW_DATA = 0;
VC_max_RAW_DATA = 0;
for(i=0;i < SAMPLES;i++)
{
VA_VOLTAGE_RAW_DATA = AdcbResultRegs.ADCRESULT0;
if(VA_VOLTAGE_RAW_DATA > VA_max_RAW_DATA)
VA_max_RAW_DATA = VA_VOLTAGE_RAW_DATA;
VB_VOLTAGE_RAW_DATA = AdcdResultRegs.ADCRESULT0;
if(VB_VOLTAGE_RAW_DATA > VB_max_RAW_DATA)
VB_max_RAW_DATA = VB_VOLTAGE_RAW_DATA;
VC_VOLTAGE_RAW_DATA = AdcdResultRegs.ADCRESULT1;
if(VC_VOLTAGE_RAW_DATA > VC_max_RAW_DATA)
VC_max_RAW_DATA = VC_VOLTAGE_RAW_DATA;
}
VA_Voltage = ((((VA_max_RAW_DATA * VIENNA_ADC_PU_SCALE_FACTOR) - 0.552 ) * 2.0f) * 454) / 1.414;
//VA_Voltage = (((VA_Voltage / 0.58928571) - 1.5) / 8.2) * 834.33;
VB_Voltage = ((((VB_max_RAW_DATA * VIENNA_ADC_PU_SCALE_FACTOR) - 0.552 ) * 2.0f) * 454) / 1.414;
//VB_Voltage = (((VB_Voltage / 0.58928571) - 1.5) / 8.2) * 834.33;
VC_Voltage = ((((VC_max_RAW_DATA * VIENNA_ADC_PU_SCALE_FACTOR) - 0.552 ) * 2.0f) * 454) / 1.414;
//VC_Voltage = (((VC_Voltage / 0.58928571) - 1.5) / 8.2) * 834.33;
q_Voltage = ((float)0.6667) * ((VA_Voltage * stCOS_SIN.cs) + (VB_Voltage * stCOS_SIN.csn) + (VC_Voltage * stCOS_SIN.csp));
d_Voltage = -((float)0.6667) * ((VA_Voltage * stCOS_SIN.sn) + (VB_Voltage * stCOS_SIN.snn) + (VC_Voltage * stCOS_SIN.snp));
}
/***************************************************************************
ADC CHANNEL ---> A0 - DC_Voltage // Stored in ADC A Result buffer 0
ADC CHANNEL ---> B0 - DC_Voltage // Stored in ADC B Result buffer 0
****************************************************************************/
void vDC_VOLTAGE_MEASUREMENT(void)
{
// DC_48_VOLT = (((AdcaResultRegs.ADCRESULT0 * 3)/BIT_RESOLUTION) * 22.27);
DC_400_VOLT = (((AdcbResultRegs.ADCRESULT0 * 3)/BIT_RESOLUTION)/8.2) * 1805.16;
}
void vControl (void)
{
if (g_u32WAIT_FLAG >= 2)
{
g_u32WAIT_FLAG = 0;
vTHREE_PHASE_VOLTAGE_MEASUREMENT();
vDC_VOLTAGE_MEASUREMENT();
vPLL();
switch (eFEC_MODE)
{
case init_fec:
vInit_mode();
break;
case idle_fec:
vIdle_mode();
break;
case pre_charge_fec:
vPre_charge_mode();
break;
case fec:
vFec_mode();
break;
case fault_fec:
vFault_mode();
break;
default:
vFault_mode();
break;
}
}
}
