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TMS320F28377D: External 24-bit ADC and SPI communications: what is the maximum data rate? Will I be limited by it?

Joel Holland
Intellectual 765 points
Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

Hi,

I need to measure 10-100mV ripple on a 6000V DC/DC converter output. Although there are ways to measure this with the 12-bit and 16-bits on the F2837xD, I think they still will not measure accurately enough.
I was thinking to use a 24-bit ADC external to the DSP and communicate with it via SPI communications.

My questions are, what is the max data rate of the SPI? Will it be able to handle 24-bit ADC measurements at a fast enough speed to not mess up my measurements?
If the clock of the SPI is triggered from the 50MHz master ADC clock, surely the SPI can transfer data at a frequency that is along the lines of the MHz range, or 1uS, which should be fine. 
With everything included, what is the max rate that I can expect to send a trigger signal to the ADC, read values with the SPI?

The bandwidth of my power supply will be around 50kHz, so it would need to measure some multiple above this to ensure accurate readings. The clock on the DSP is 50MHz but I am unsure from the data sheets how fast the SPI interface runs, how long it takes to propagate signals. I would need to do multiple reads from the SPI interface for 24-bit, 3 8-bit reads for example. I am worried that even with a fast 24-bit ADC that the accuracy of my power supply output will be limited by how fast the control algorithm can read from the SPI interface and change the output of the PWM. 

Regards,
Joel

  • 0
    TI__Mastermind 29141 points

    Hi Joel,

    Joel Holland said:
    My questions are, what is the max data rate of the SPI? Will it be able to handle 24-bit ADC measurements at a fast enough speed to not mess up my measurements?

    There is a lot packed into this question. The max speed of the SPI is given in the F2837xD data sheet: 50MHz. You would need to do some work to ensure the electrical timings are met when interfacing the SPI to the ADC at this speed, i.e. ensure there are no setup/hold time violations.

    The max data rate depends on the data size (24-bit) & efficiency of the transfers within the device. This last piece are impacted by SPI FIFO use (I'd recommend use FIFO), and CPU/DMA MIPs availability (largely depends on how you architect your code). 

    Btw, there is are C2000ware SPI examples for the F2837xD which you could use to do some profiling work assuming you have an EVM to play with.

    Joel Holland said:
    The clock on the DSP is 50MHz but I am unsure from the data sheets how fast the SPI interface runs, how long it takes to propagate signals.

    Not sure where you are getting 50MHz, the CPU can run up to 200Mhz, or maybe I'm misreading your statement.

  • 0 in reply to Gus Martinez
    Intellectual 765 points

    Hi, 

    Apologies for the complicated question. I just trying to get my head around the SPI protocol and capabilities of the device. I understand that the maximum speed of the SPI is 50MHz but as you mention, the actual data rate for a certain bit word is not given in the data sheet. I plan to use FIFO as you suggest, and I am about to ask another question regarding DMA because I have heard this is the fastest way to communicate and also frees the CPU for other processing tasks, which would be handy. Is it a fact that SPI with DMA is the fastest possible way to use the SPI for external ADC's? Do you have a ballpark figure for the data/baud rate that can be achieved with DMA and SPI in conjunction? Is it even possible to use DMA with a 24-bit word? 

    Best regards
    Joel

  • 0 in reply to Joel Holland
    TI__Mastermind 29141 points
    Joel Holland said:
    Is it a fact that SPI with DMA is the fastest possible way to use the SPI for external ADC's?

    I am not sure if DMA is faster than CPU, but it does free up your CPU MIPs. I guess the real question: is DMA fast enough?

    Joel Holland said:
    Do you have a ballpark figure for the data/baud rate that can be achieved with DMA and SPI in conjunction?

    At 50MHz clock rate and 24-bit ADC sample size you would expect to move an ADC sample every ~2MHz (that's ~50 cycles with a 100MHz clock rate). The DMA has a throughput of 3 cycles/word, where word = 16-bit for SPI. I think the SPI you could configure the data size to 8-bit and interrupt the DMA after three data values have been received in the FIFO. The DMA would then be configured to do 3 16-bit data transfers. That would give 3 words x 3 cycles/word = 9 cycles, which should be plenty fast.

    Note: I don't believe you can configure the DMA to only move 8-bit data from the SPI. I think it has to be 16-bits always. Still each DMA 16-bit word move should only have 8-bits of real data. There are some tricks you can play with the DMA transfer setup such that those extra 8-bits are overwritten during the transfer.