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LAUNCHXL-F28379D: Interrupt not called but data is tramitting SPI Interrupt based communication

Part Number: LAUNCHXL-F28379D

Hello,

I am out of clue what is happening here.

I have created simple test progam as below.

SPI Master Side.

#include "driverlib.h"
#include "device.h"
#include <stdint.h>
#include <stdbool.h>
#define uint8_t     unsigned char

#define CPU_COMM_MODE_MASTER    1

#define PACKET_SIZE         (10)

void initCPUTimers(void);
void configCPUTimer(uint32_t, float, float);
void setupUART();

void initSPIB(void);
void configGPIOs(void);

__interrupt void cpuTimer1ISR(void);
__interrupt void spiMasterTxFIFOISR(void);
__interrupt void spiMasterRxFIFOISR(void);

char tmpStr[20];

uint16_t txData[PACKET_SIZE];
uint16_t rxData[PACKET_SIZE];

uint32_t txCounter;
uint32_t rxCounter;
uint32_t timerCounter;

bool dataReceived;

void main(void)
{
    char *msg;

    Device_init();
    Device_initGPIO();

    Interrupt_initModule();
    Interrupt_initVectorTable();
    setupUART();

    initCPUTimers();
    configCPUTimer(CPUTIMER1_BASE, DEVICE_SYSCLK_FREQ, 1000000);
    CPUTimer_enableInterrupt(CPUTIMER1_BASE);
    Interrupt_register(INT_TIMER1, &cpuTimer1ISR);
    Interrupt_enable(INT_TIMER1);
    CPUTimer_startTimer(CPUTIMER1_BASE);

    Interrupt_register(INT_SPIB_TX, &spiMasterTxFIFOISR);
    Interrupt_register(INT_SPIB_RX, &spiMasterRxFIFOISR);

    EINT;
    ERTM;

    txCounter = 0;
    rxCounter = 0;
    timerCounter = 0;
    dataReceived = 0;

    unsigned char i;

    uint8_t *ptr = (uint8_t*)txData;

    for(i=0; i< 100; i++){
        *ptr++ = i;
    }

    configGPIOs();
    initSPIB();
    Interrupt_enable(INT_SPIB_RX);

    EINT;
    ERTM;

    uint32_t tmp, tmp2;

    for(;;)
    {
//        if(cpuCommFillData()){
//            msg = " Hello\r\n\0";
//            SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));
//            cpuCommDataFilled();
//        }
//
        if(dataReceived){
            for(tmp = 0; tmp < PACKET_SIZE; tmp++){
                tmp2 = rxData[tmp];
                ltoa(tmp2, tmpStr, 10);
                SCI_writeCharArray(SCIA_BASE, (uint16_t*)tmpStr, strlen(tmpStr));

                msg = ", ";
                SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));
            }
            msg = "\r\n";
            SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));
            rxReset();
        }
    }
}

void configGPIOs(void)
{
    GPIO_setMasterCore(25, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_25_SPISOMIB);
    GPIO_setPadConfig(25, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(25, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(24, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_24_SPISIMOB);
    GPIO_setPadConfig(24, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(24, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(27, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_27_SPISTEB);
    GPIO_setPadConfig(27, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(27, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(26, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_26_SPICLKB);
    GPIO_setPadConfig(26, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(26, GPIO_QUAL_ASYNC);
}

void initSPIB(void)
{
    SPI_disableModule(SPIB_BASE);

#ifdef CPU_COMM_MODE_MASTER
    SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0, SPI_MODE_MASTER, 400000, 16);
#else
    SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0, SPI_MODE_SLAVE, 400000, 16);
#endif
    SPI_disableLoopback(SPIB_BASE);
    SPI_setEmulationMode(SPIB_BASE, SPI_EMULATION_STOP_AFTER_TRANSMIT);

    SPI_enableFIFO(SPIB_BASE);
    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_TXFF);
    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_RXFF);
    SPI_setFIFOInterruptLevel(SPIB_BASE, SPI_FIFO_TX2, SPI_FIFO_RX2);
    SPI_enableInterrupt(SPIB_BASE, SPI_INT_TXFF);
    SPI_enableInterrupt(SPIB_BASE, SPI_INT_RXFF);

    SPI_enableModule(SPIB_BASE);
}

void setupUART(){
    GPIO_setMasterCore(DEVICE_GPIO_PIN_SCIRXDA, GPIO_CORE_CPU1);
    GPIO_setPinConfig(DEVICE_GPIO_CFG_SCIRXDA);
    GPIO_setDirectionMode(DEVICE_GPIO_PIN_SCIRXDA, GPIO_DIR_MODE_IN);
    GPIO_setPadConfig(DEVICE_GPIO_PIN_SCIRXDA, GPIO_PIN_TYPE_STD);
    GPIO_setQualificationMode(DEVICE_GPIO_PIN_SCIRXDA, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(DEVICE_GPIO_PIN_SCITXDA, GPIO_CORE_CPU1);
    GPIO_setPinConfig(DEVICE_GPIO_CFG_SCITXDA);
    GPIO_setDirectionMode(DEVICE_GPIO_PIN_SCITXDA, GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig(DEVICE_GPIO_PIN_SCITXDA, GPIO_PIN_TYPE_STD);
    GPIO_setQualificationMode(DEVICE_GPIO_PIN_SCITXDA, GPIO_QUAL_ASYNC);

    Interrupt_initModule();
    Interrupt_initVectorTable();

    SCI_performSoftwareReset(SCIA_BASE);

    SCI_setConfig(SCIA_BASE, DEVICE_LSPCLK_FREQ, 115200, (SCI_CONFIG_WLEN_8 |
            SCI_CONFIG_STOP_ONE |
            SCI_CONFIG_PAR_NONE));
    SCI_resetChannels(SCIA_BASE);
    SCI_resetRxFIFO(SCIA_BASE);
    SCI_resetTxFIFO(SCIA_BASE);
    SCI_clearInterruptStatus(SCIA_BASE, SCI_INT_TXFF | SCI_INT_RXFF);
    SCI_enableFIFO(SCIA_BASE);
    SCI_enableModule(SCIA_BASE);
    SCI_performSoftwareReset(SCIA_BASE);
}


void initCPUTimers(void)
{
    CPUTimer_setPeriod(CPUTIMER1_BASE, 0xFFFFFFFF);
    CPUTimer_setPreScaler(CPUTIMER1_BASE, 0);
    CPUTimer_stopTimer(CPUTIMER1_BASE);
    CPUTimer_reloadTimerCounter(CPUTIMER1_BASE);
}

void configCPUTimer(uint32_t cpuTimer, float freq, float period)
{
    uint32_t temp;

    temp = (uint32_t)(freq / 1000000 * period);
    CPUTimer_setPeriod(cpuTimer, temp);

    CPUTimer_setPreScaler(cpuTimer, 0);

    CPUTimer_stopTimer(cpuTimer);
    CPUTimer_reloadTimerCounter(cpuTimer);
    CPUTimer_setEmulationMode(cpuTimer,
                              CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT);
    CPUTimer_enableInterrupt(cpuTimer);
}

void txReset(){
    txCounter = 0;
//    txState = CPU_COMM_TX_STATE_TRANSMITTING;
    Interrupt_enable(INT_SPIB_TX);
}

void rxReset(){
    rxCounter = 0;
    dataReceived = 0;
}

//running @ 100uS interval
__interrupt void cpuTimer1ISR(void){

    txReset();
//#else
//    if((rxState != CPU_COMM_RX_STATE_IDEAL || rxState != CPU_COMM_RX_STATE_RECEIVED) && lastRXTime + 30 < timerCounter)
//        cpuCommResetRX();
//#endif
}

__interrupt void spiMasterTxFIFOISR(void)
{
    if(txCounter < PACKET_SIZE){
        SPI_writeDataNonBlocking(SPIB_BASE, txData[txCounter++]);
        SPI_writeDataNonBlocking(SPIB_BASE, txData[txCounter++]);
    }
    else if(txCounter < PACKET_SIZE + 2){
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
        Interrupt_disable(INT_SPIB_TX);
    }
    else{
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
    }

    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_TXFF);
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
}

__interrupt void spiMasterRxFIFOISR(void)
{
    if(rxCounter < PACKET_SIZE){
        rxData[rxCounter++] = SPI_readDataNonBlocking(SPIB_BASE);
        rxData[rxCounter++] = SPI_readDataNonBlocking(SPIB_BASE);
    }
    else{
        //dummy read
        dataReceived = 1;
        SPI_readDataNonBlocking(SPIB_BASE);
        SPI_readDataNonBlocking(SPIB_BASE);
    }

    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_RXFF);
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
}

SPI Slave Side.

#include "driverlib.h"
#include "device.h"
#include <stdint.h>
#include <stdbool.h>
#define uint8_t     unsigned char

//#define CPU_COMM_MODE_MASTER    1

#define PACKET_SIZE         (10)

void initCPUTimers(void);
void configCPUTimer(uint32_t, float, float);
void setupUART();

void initSPIB(void);
void configGPIOs(void);

__interrupt void cpuTimer1ISR(void);
__interrupt void spiMasterTxFIFOISR(void);
__interrupt void spiMasterRxFIFOISR(void);

char tmpStr[20];

uint16_t txData[PACKET_SIZE];
uint16_t rxData[PACKET_SIZE];

uint32_t txCounter;
uint32_t rxCounter;
uint32_t timerCounter;
uint32_t txPacketCounter;
uint32_t rxPacketCounter;

bool dataReceived;

void main(void)
{
    char *msg;

    Device_init();
    Device_initGPIO();

    Interrupt_initModule();
    Interrupt_initVectorTable();
    setupUART();

    initCPUTimers();
    configCPUTimer(CPUTIMER1_BASE, DEVICE_SYSCLK_FREQ, 1000000);
    CPUTimer_enableInterrupt(CPUTIMER1_BASE);
    Interrupt_register(INT_TIMER1, &cpuTimer1ISR);
    Interrupt_enable(INT_TIMER1);
    CPUTimer_startTimer(CPUTIMER1_BASE);

    Interrupt_register(INT_SPIB_TX, &spiMasterTxFIFOISR);
    Interrupt_register(INT_SPIB_RX, &spiMasterRxFIFOISR);

    EINT;
    ERTM;

    txCounter = 0;
    rxCounter = 0;
    timerCounter = 0;
    txPacketCounter = 0;
    rxPacketCounter = 0;
    dataReceived = 0;

    unsigned char i;

    uint8_t *ptr = (uint8_t*)txData;

    for(i=0; i< 100; i++){
        *ptr++ = i;
    }

    configGPIOs();
    initSPIB();
    Interrupt_enable(INT_SPIB_RX);

    EINT;
    ERTM;

    uint32_t tmp, tmp2;

    for(;;)
    {
//        if(cpuCommFillData()){
//            msg = " Hello\r\n\0";
//            SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));
//            cpuCommDataFilled();
//        }
//
        if(dataReceived){
            for(tmp = 0; tmp < PACKET_SIZE; tmp++){
                tmp2 = rxData[tmp];
                ltoa(tmp2, tmpStr, 10);
                SCI_writeCharArray(SCIA_BASE, (uint16_t*)tmpStr, strlen(tmpStr));

                msg = ", ";
                SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));
            }

            msg = " txpc ";
            SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));

            ltoa(txPacketCounter, tmpStr, 10);
            SCI_writeCharArray(SCIA_BASE, (uint16_t*)tmpStr, strlen(tmpStr));

            msg = " rxpc ";
            SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));

            ltoa(rxPacketCounter, tmpStr, 10);
            SCI_writeCharArray(SCIA_BASE, (uint16_t*)tmpStr, strlen(tmpStr));

            msg = "\r\n";
            SCI_writeCharArray(SCIA_BASE, (uint16_t*)msg, strlen(msg));
            rxReset();
        }
    }
}

void configGPIOs(void)
{
    GPIO_setMasterCore(25, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_25_SPISOMIB);
    GPIO_setPadConfig(25, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(25, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(24, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_24_SPISIMOB);
    GPIO_setPadConfig(24, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(24, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(27, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_27_SPISTEB);
    GPIO_setPadConfig(27, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(27, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(26, GPIO_CORE_CPU1);
    GPIO_setPinConfig(GPIO_26_SPICLKB);
    GPIO_setPadConfig(26, GPIO_PIN_TYPE_PULLUP);
    GPIO_setQualificationMode(26, GPIO_QUAL_ASYNC);
}

void initSPIB(void)
{
    SPI_disableModule(SPIB_BASE);

#ifdef CPU_COMM_MODE_MASTER
    SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0, SPI_MODE_MASTER, 400000, 16);
#else
    SPI_setConfig(SPIB_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0, SPI_MODE_SLAVE, 400000, 16);
#endif
    SPI_disableLoopback(SPIB_BASE);
    SPI_setEmulationMode(SPIB_BASE, SPI_EMULATION_STOP_AFTER_TRANSMIT);

    SPI_enableFIFO(SPIB_BASE);
    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_TXFF);
    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_RXFF);
    SPI_setFIFOInterruptLevel(SPIB_BASE, SPI_FIFO_TX2, SPI_FIFO_RX2);
    SPI_enableInterrupt(SPIB_BASE, SPI_INT_TXFF);
    SPI_enableInterrupt(SPIB_BASE, SPI_INT_RXFF);

    SPI_enableModule(SPIB_BASE);
}

void setupUART(){
    GPIO_setMasterCore(DEVICE_GPIO_PIN_SCIRXDA, GPIO_CORE_CPU1);
    GPIO_setPinConfig(DEVICE_GPIO_CFG_SCIRXDA);
    GPIO_setDirectionMode(DEVICE_GPIO_PIN_SCIRXDA, GPIO_DIR_MODE_IN);
    GPIO_setPadConfig(DEVICE_GPIO_PIN_SCIRXDA, GPIO_PIN_TYPE_STD);
    GPIO_setQualificationMode(DEVICE_GPIO_PIN_SCIRXDA, GPIO_QUAL_ASYNC);

    GPIO_setMasterCore(DEVICE_GPIO_PIN_SCITXDA, GPIO_CORE_CPU1);
    GPIO_setPinConfig(DEVICE_GPIO_CFG_SCITXDA);
    GPIO_setDirectionMode(DEVICE_GPIO_PIN_SCITXDA, GPIO_DIR_MODE_OUT);
    GPIO_setPadConfig(DEVICE_GPIO_PIN_SCITXDA, GPIO_PIN_TYPE_STD);
    GPIO_setQualificationMode(DEVICE_GPIO_PIN_SCITXDA, GPIO_QUAL_ASYNC);

    Interrupt_initModule();
    Interrupt_initVectorTable();

    SCI_performSoftwareReset(SCIA_BASE);

    SCI_setConfig(SCIA_BASE, DEVICE_LSPCLK_FREQ, 115200, (SCI_CONFIG_WLEN_8 |
            SCI_CONFIG_STOP_ONE |
            SCI_CONFIG_PAR_NONE));
    SCI_resetChannels(SCIA_BASE);
    SCI_resetRxFIFO(SCIA_BASE);
    SCI_resetTxFIFO(SCIA_BASE);
    SCI_clearInterruptStatus(SCIA_BASE, SCI_INT_TXFF | SCI_INT_RXFF);
    SCI_enableFIFO(SCIA_BASE);
    SCI_enableModule(SCIA_BASE);
    SCI_performSoftwareReset(SCIA_BASE);
}


void initCPUTimers(void)
{
    CPUTimer_setPeriod(CPUTIMER1_BASE, 0xFFFFFFFF);
    CPUTimer_setPreScaler(CPUTIMER1_BASE, 0);
    CPUTimer_stopTimer(CPUTIMER1_BASE);
    CPUTimer_reloadTimerCounter(CPUTIMER1_BASE);
}

void configCPUTimer(uint32_t cpuTimer, float freq, float period)
{
    uint32_t temp;

    temp = (uint32_t)(freq / 1000000 * period);
    CPUTimer_setPeriod(cpuTimer, temp);

    CPUTimer_setPreScaler(cpuTimer, 0);

    CPUTimer_stopTimer(cpuTimer);
    CPUTimer_reloadTimerCounter(cpuTimer);
    CPUTimer_setEmulationMode(cpuTimer,
                              CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT);
    CPUTimer_enableInterrupt(cpuTimer);
}

void txReset(){
    txCounter = 0;
//    txState = CPU_COMM_TX_STATE_TRANSMITTING;
    Interrupt_enable(INT_SPIB_TX);
}

void rxReset(){
    rxCounter = 0;
    dataReceived = 0;
}

//running @ 100uS interval
__interrupt void cpuTimer1ISR(void){

//    txReset();
//#else
//    if((rxState != CPU_COMM_RX_STATE_IDEAL || rxState != CPU_COMM_RX_STATE_RECEIVED) && lastRXTime + 30 < timerCounter)
//        cpuCommResetRX();
//#endif
}

__interrupt void spiMasterTxFIFOISR(void)
{
    if(txCounter < PACKET_SIZE){
        SPI_writeDataNonBlocking(SPIB_BASE, txData[txCounter++]);
        SPI_writeDataNonBlocking(SPIB_BASE, txData[txCounter++]);
    }
    else if(txCounter < PACKET_SIZE + 2){
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
        txReset();
//        Interrupt_disable(INT_SPIB_TX);
        txPacketCounter++;
    }
    else{
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
        SPI_writeDataNonBlocking(SPIB_BASE, 0xFF);
    }

    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_TXFF);
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
}

__interrupt void spiMasterRxFIFOISR(void)
{
//    if(rxCounter == 0)
//        txReset();

    if(rxCounter < PACKET_SIZE){
        rxData[rxCounter++] = SPI_readDataNonBlocking(SPIB_BASE);
        rxData[rxCounter++] = SPI_readDataNonBlocking(SPIB_BASE);
    }
    else{
        //dummy read
        dataReceived = 1;
        rxPacketCounter++;
        SPI_readDataNonBlocking(SPIB_BASE);
        SPI_readDataNonBlocking(SPIB_BASE);
    }

    SPI_clearInterruptStatus(SPIB_BASE, SPI_INT_RXFF);
    Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP6);
}

I am using 2 Development board and connected GPIO 24,25,26,27 to same pin.

I was having dificulty in deciding how to seperate each packet, while debuging I face this strange situation.

I am using logic analyzer to analyze GPIO 24,25,26,27 and decoding spi packets.

SPI Slave is transmitting data, 0x00ff, 0x0001,0x0002 ...

But TX Interrupt is not being called, I put there break point but it not stop.

I add there counter but it's not incresing.

  • Also some other question in master code, I am using  Interrupt_enable(), Interrupt_disable(), is it right way to start stop spi communication , I can't find any official suggest way.
  • Even after SPI_resetTxFIFO() Slave TX First 16 bite is random data. any suggestion why ? 

Any suggestion ?

Regards

Piyush

  • Hi Piyush,

    SPI Slave is transmitting data, 0x00ff, 0x0001,0x0002 ...

    But TX Interrupt is not being called, I put there break point but it not stop.

    In the code you provided for the SPI slave, the only place I see data being written to the TX Buffer is in the SPI TX ISR. Can you please check the status of the TXFFINT bit and the TXFFST bits within the SPIFFTX register to know the status of the TX interrupt. 

    Also some other question in master code, I am using  Interrupt_enable(), Interrupt_disable(), is it right way to start stop spi communication , I can't find any official suggest way.

    Are you hoping to stop both transmitting and receiving from the Master side or just transmission?

    Even after SPI_resetTxFIFO() Slave TX First 16 bite is random data. any suggestion why ? 

    When are you calling the SPI_resetTXFIFO() function?

    Best Regards,

    Marlyn

  • Hi Marlyn,

    • In the code you provided for the SPI slave, the only place I see data being written to the TX Buffer is in the SPI TX ISR. Can you please check the status of the TXFFINT bit and the TXFFST bits within the SPIFFTX register to know the status of the TX interrupt. 
      • I will check for it,
      • How ever I found why interuppt was not called because it was not enabled.
      • Why data was transmitting still no idea, I have make sure interrupt is not called by putting a counter in interrupt.
    • Are you hoping to stop both transmitting and receiving from the Master side or just transmission?
      • I want to stop both side,
      • Basicly we want to excahnge fix size data on certain interval.
    • When are you calling the SPI_resetTXFIFO() function?
      • When there is no data received for 3 ms then I call SPI_resetTXFIFO(). possibly data still hold in buffer and when it get next clock buffered 16bit data is transmitted

    Regards

    Piyush

  • Hi Piyush,

    Are you hoping to stop both transmitting and receiving from the Master side or just transmission?
    • I want to stop both side,
    • Basicly we want to excahnge fix size data on certain interval.

    We don't have an official way for this but enabling/disabling the interrupt is one of the easiest ways to accomplish this.

    When there is no data received for 3 ms then I call SPI_resetTXFIFO(). possibly data still hold in buffer and when it get next clock buffered 16bit data is transmitted

    I don't see the SPI_resetTXFIFO() function within your code. Something you could also try to reset the FIFOs to their default state is,

    SPI_disableFIFO(base); // Disable FIFO register
    SPI_enableFIFO(base); // Enable FIFO register

    Best Regards,

    Marlyn

  • Hi Marlyn,

    • We don't have an official way for this but enabling/disabling the interrupt is one of the easiest ways to accomplish this.
      • Noted but it's really making imposible to implemet slave side.
    • I don't see the SPI_resetTXFIFO() function within your code. Something you could also try to reset the FIFOs to their default state is,
      • My full code is bulky so I simplified my code and post in forum so that it's easy to understand and replicate problem for anyone.
      • If you want I can add SPI_resetTXFIFO code in test code.
      • SPI_disableFIFO SPI_enableFIFO is worstening the situation it's causing 4times 16 bit delay in slave tx side where SPI_resetTXFIFO addes only 1 16 bit delay.
      • but the bigger problem is it's very random some time it not add 16 bit delay.
    • is this bug effecting me ?

    *** Is it posisble to fix some time for direct communication ?

    Regards

    Piyush

  • Hi Piyush,

    My full code is bulky so I simplified my code and post in forum so that it's easy to understand and replicate problem for anyone.

    Please allow me some time to look through the entire code you have provided. I will reply back with further inputs. 

    is this bug effecting me ?

    The McBSP module is a separate module from SPI. It has SPI mode, but in your case you are using the SPI module itself.

    Best Regards,

    Marlyn