This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

McbspB to SPI mode: The receiver is always 0xFF in clock stop mode without delay

Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE

Hi:

    The demo code I used is "F:\C2000_SDK\C2000Ware_1_00_03_00\device_support\f2833x\examples\mcbsp_loopback_dma". I change the mcbsp_spi mode from DLB to clock stop mode. The CLK of SPI is 400KHz.

    I want to use MCBSPB as SPI mode to communicate with SD card. Here below is my configuration.

void InitMcbspbGpio(void)
{
    EALLOW;

    // Configure McBSP-A pins using GPIO regs
    // This specifies which of the possible GPIO pins will be McBSP functional
    // pins.
    // Comment out other unwanted lines.
    GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3;	    // GPIO12 is MDXB pin MOSI
    GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3;	    // GPIO13 is MDRB pin MISO
    GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3;	    // GPIO14 is MCLKXB pin CLK
    GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3;	    // GPIO15 is MFSXB pin

    // Enable internal pull-up for the selected pins
    // Pull-ups can be enabled or disabled by the user.
    // This will enable the pullups for the specified pins.
    // Comment out other unwanted lines.
    GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;	        //Enable pull-up on GPIO12 (MDXB)
    GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;	        //Enable pull-up on GPIO13 (MDRB)
    GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;	        //Enable pull-up on GPIO14 (MCLKXB)
    GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;	        //Enable pull-up on GPIO15 (MFSXB)

    // Set qualification for selected input pins to asynch only
    // This will select asynch (no qualification) for the selected pins.
    // Comment out other unwanted lines.
    GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch input GPIO13 (MDRB)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // Asynch input GPIO14 (MCLKXB)
    GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // Asynch input GPIO15 (MFSXB)

    EDIS;
}

void McbspB_init(void)
{

    EALLOW;
    SysCtrlRegs.PCLKCR0.bit.MCBSPAENCLK = 1;      // enable low speed clock to McBSP-A
    SysCtrlRegs.PCLKCR0.bit.MCBSPBENCLK = 1;      // enable low speed clock to McBSP-B
    EDIS;

    // Reset FS generator, sample rate generator & transmitter
    McbspbRegs.SPCR2.all=0x0000;
    McbspbRegs.SPCR1.all=0x0000;                 // Reset Receiver, Right justify word
    McbspbRegs.PCR.all = 0xF08;                  // CLKXM = CLKRM = FSXM = FSRM = 1, FSXP = 1

    // clocking scheme:
    //McbspbRegs.MFFINT.all=0x0;                 // Disable all interrupts
    McbspbRegs.SPCR1.bit.CLKSTP = 2;             // clock stop mode, without clock delay
    McbspbRegs.PCR.bit.CLKXP = 1;                // transmit data are sampled on the rising edge of clock signal
    McbspbRegs.PCR.bit.CLKRP = 0;                // receive data are sampled on the falling edge of clock signal

    McbspbRegs.RCR2.bit.RDATDLY = 1;             // 1 for master mode, 0 for slave mode (?)
    McbspbRegs.XCR2.bit.XDATDLY = 1;             // 1 for master mode, 0 for slave mode (?)

    McbspbRegs.RCR1.bit.RWDLEN1 = 0;             // 8-bit word
    McbspbRegs.XCR1.bit.XWDLEN1 = 0;             // 8-bit word


    McbspbRegs.SRGR2.all = 0x2000;               // CLKSM = 1, FPER = 1 CLKG period
     //               LSPCLK
     // CLKG_freq = ----------
     //             CLKGDV + 1
    //McbspbRegs.SRGR1.all = 0x000F;             // frame width = 1 CLKG period, CLKGDV = 15 (2.34 MHz)
    McbspbRegs.SRGR1.all = 95;               // frame width = 1 CLKG period, CLKGDV = 5 (6.25 MHz)
    //
    // Enable Sample rate generator
    //
    McbspbRegs.SPCR2.bit.GRST=1;    // Enable the sample rate generator
    delay_loop();                   // Wait at least 2 SRG clock cycles
    McbspbRegs.SPCR2.bit.XRST=1;    // Release TX from Reset
    McbspbRegs.SPCR1.bit.RRST=1;    // Release RX from Reset
    McbspbRegs.SPCR2.bit.FRST=1;    // Frame Sync Generator reset
}

I need use 400Khz CLK to send cmd to init SD card. However, no matter what I send in "DXR1", the receive reg"DRR1" will always be 0xFF. 

Is there anything wrong with my MCBSP configuration?

By the way, I can not do loop back test becasue the hardwire circuit is fixed. Also, I have disabled tx and rx interrupt, is that matter?

  • I'm not seeing any issues with your configuration so far. It appears to match all the required register values for SPI mode that are documented in the TRM. Are you able to probe the SPI pins at all to display them with a logic analyzer or oscilloscope to see what is actually being sent?

    Whitney