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TMS320F28075: F28075 PowerPAD layout

Part Number: TMS320F28075


Hi expert,

My customer used F280049 before, they placed some traces under the bottom of F280049 when layout.

Now they are designing with F28075, in datasheet, it is said the bottom of F28075 should be soldered to the ground plane.

Customer want to know is it necessary to make all of the bottom to be soldered to ground? or could they just make part of F28075 bottom to be soldered to ground, and leave part of the bottom for other traces?

Regards,

Jared Liu

  • Hi Jared,

    Which package is being used? The 100-pin or 176-pin?

    Customer want to know is it necessary to make all of the bottom to be soldered to ground? or could they just make part of F28075 bottom to be soldered to ground, and leave part of the bottom for other traces?

    The PowerPad serves as the only path to the digital ground of the device as well as for dissipating heat. In our datasheet we say 'the thermal land should be as large as needed to dissipate the required heat'. That the physical size of the landing is probably more related to heat dissipation than the path to digital GND.

    The size of the exposed pad on the bottom of the device is squared in red below, taken from the mechanical drawing portion of the datasheet. Ideally the thermal landing should be at least this large and exposed for the best solder connection.

    For more details on the PowerPad design you can take a look at the App Note below:

    https://www.ti.com/lit/slma002

    Best,

    Kevin

  • Hi Kevin,

    Thanks for your suggestions.

    Q: "Which package is being used? The 100-pin or 176-pin?"

    A: Customer use 100pin package. What's the difference between 100 pin and 176 pin regarding customer's question?

    Thanks and regards,

    Jared Liu. 

  • Hi Jared,

    A: Customer use 100pin package. What's the difference between 100 pin and 176 pin regarding customer's question?

    OK. Looking at the mechanical drawings in section 11 'Mechanical, Packaging, and Orderable Information' of the device datasheet, it looks like the PowerPad on the 176-pin package takes up less area of the total device. That's why I asked, they could have more room to route traces underneath the device with the 176-pin.

    See below for the 176-pin package for comparison.

    Best,

    Kevin

  • Hi Kevin,

    Sorry for reopen this thread. There are some more questions from customer. I studied the appnote of POWERPAD, but I don't have much experience on layout, so it's better if you can give the answers:

    1. In customer' layout, the size of PWOERPAD is 9.3*9.3, which is larger than datasheet recommend 8.64*8.64, is that ok?

    2. Customer prefer to use plated through holes which goes through all 4 layers, these holes connect the 4th layer power pad, and the 3rd layer GND. Could customer place traces between these holes in the 1st and 2nd layers? 

    3,  From datasheet ,the diameter of VIAs is 0.2, but how much VIAs is needed? What's the pitch between VIAs? 

    Regards and thanks.

    Jared Liu

  • Hi Jared,

    1. In customer' layout, the size of PWOERPAD is 9.3*9.3, which is larger than datasheet recommend 8.64*8.64, is that ok?

    Yes, that is fine. I don't see any issues with making the pad a little bigger. The datasheet drawing you pasted is just an example, but customers can make slight changes to it if needed.

    2. Customer prefer to use plated through holes which goes through all 4 layers, these holes connect the 4th layer power pad, and the 3rd layer GND. Could customer place traces between these holes in the 1st and 2nd layers? 

    Plated through-holes or vias are what I'd expect customers to use. Buried vias to connect just layer 3 and 4 would be a cost adder.Make sure the vias on the component side are exposed for solder to flow through them.

    Yes I think it's fine to include traces between the holes like shown. Just ensure the design rules are properly set so the traces don't come too close together or to the GND vias.

    3,  From datasheet ,the diameter of VIAs is 0.2, but how much VIAs is needed? What's the pitch between VIAs? 

    The pitch shown in the datasheet is 1mm between vias. 1.5mm pitch is mentioned in the PowerPad app note, so it may be possible to use less vias. The number of vias is really subject to the amount of heat that must be moved away from the package, which is somewhat application specific.

    Best,

    Kevin