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TMS320F28374D: TMS320F2837xD DMA does not copy the data although address increment happens

UMA SANKAR KALLURU
Prodigy 30 points
Part Number: TMS320F28374D
Other Parts Discussed in Thread: C2000WARE

Hi I am trying to get DMA working , first I am trying to transfer from one array to another. I can see SRC_ADDR_ACTIVE and DST_ADDR_ACTIVE are incremented but I do not see the values changed. 

Can anyone help me if anything is wrong in the below code

Below is the code 

Init:

===================

DMASource = (volatile Uint16 *)dutyCyclePercentSine;
DMADest = (volatile Uint16 *)result;


EALLOW;


DmaRegs.DMACTRL.bit.HARDRESET = 1;
__asm(" NOP");

DmaRegs.DEBUGCTRL.bit.FREE = 1;


DmaRegs.CH1.SRC_ADDR_SHADOW = (Uint32)DMASource;
DmaRegs.CH1.SRC_BEG_ADDR_SHADOW = (Uint32)DMASource;
DmaRegs.CH1.DST_ADDR_SHADOW = (Uint32)DMADest;
DmaRegs.CH1.DST_BEG_ADDR_SHADOW = (Uint32)DMADest;


// Channel 1
DmaRegs.CH1.BURST_SIZE.all = 0;
DmaRegs.CH1.SRC_BURST_STEP = 1;
DmaRegs.CH1.DST_BURST_STEP = 1;

DmaRegs.CH1.TRANSFER_SIZE = 9;
DmaRegs.CH1.SRC_TRANSFER_STEP = 1;
DmaRegs.CH1.DST_TRANSFER_STEP = 1;


DmaClaSrcSelRegs.DMACHSRCSEL1.bit.CH1 = 0;

DmaRegs.CH1.MODE.bit.PERINTSEL = 1;

DmaRegs.CH1.MODE.bit.PERINTE = 1;
DmaRegs.CH1.MODE.bit.CHINTE = 0;
DmaRegs.CH1.MODE.bit.ONESHOT = 0;
DmaRegs.CH1.MODE.bit.CONTINUOUS = 0;
DmaRegs.CH1.MODE.bit.DATASIZE = 0;
DmaRegs.CH1.MODE.bit.CHINTMODE = 0;
DmaRegs.CH1.MODE.bit.CHINTE = 0;

CpuSysRegs.SECMSEL.bit.PF2SEL = 1;
CpuSysRegs.SECMSEL.bit.PF1SEL = 1;


DmaRegs.CH1.CONTROL.bit.RUN = 1;

EDIS;

========================

in main.c I do 

int count = 0;
while(1)
{

count++;
if(count == 0xFFFF)
{
EALLOW;
DmaRegs.CH1.CONTROL.bit.PERINTFRC = 1;
// EPwm1Regs.CMPA.bit.CMPA = 1500;
EDIS;
count = 0;
// RunSPWM();
}

}

  • 0
    TI__Guru* 80560 points

    Uma,

    Please change the CONTINUOUS to a "1" and see if that fixes things.  When CONTINUOUS = 0, then you have to write to the RUN bit between transfers to re-arm the DMA.  CONTINUOUS = 1 will keep the DMA armed.

    The DMA ISR will fire after each transfer if enabled, but I don't think you are using ISR in your code yet.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Prodigy 30 points

    Hi Mathew, 

    Thanks for your reply. I have tried changing CONTINUOUS to a "1".  But it does not work. 

    Any other things I am missing.

    -Umasankar K

  • 0 in reply to UMA SANKAR KALLURU
    TI__Guru* 80560 points

    Uma,

    Can you confirm the address range/memory type that you have selected for the DMA results to go to?  Only the GSx(0xC000 - 0x1BFFF) memories are accessible by the DMA. 

    Best,
    Matthew

  • 0 in reply to MatthewPate
    Prodigy 30 points

    Hi Mathew,

    I am trying to access below memory area 

    00082425 0000000d spwm_hal.obj (.cinit:_dutyCyclePercentSine)
    00082432 0000000d spwm_hal.obj (.cinit:_result)

    How do I make sure they are placed in GS RAM? 

    Also ultimately I need to write to EPwm1Regs by DMA, so you are saying it is not possible to write to the addresses beyond the region of (0xC000 - 0x1BFFF) ? 

    EPwm1Regs EPWM_REGS 0x0000_4000 0x0000_40FF

  • +1 in reply to UMA SANKAR KALLURU
    TI__Guru* 80560 points

    Uma,

    I should have clarified a bit more, in terms of RAM that is accessible by the DMA the GSx I mentioned is correct.  The DMA also has access to certain peripherals including the ePWM so that address range is fine.

    So for the variable dutyCyclePercentSine that is the source, you would need to place this in one of the GSx RAMs.  There are a few ways to do this, you could assign your .data section to GSx globally.  Or you could use a #pragma DATA_SECTION(X,X) to assign just that variable to a GSx RAM.

    The DMA example in C2000Ware C:\ti\c2000\C2000Ware_4_00_00_00\driverlib\f2837xd\examples\cpu1\dma\  shows how to place sections using the above pragma DATA_SECTION directive.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Prodigy 30 points

    Thank you Mathew,

    key point was to place the array at GS0RAM, now I am able to use DMA to transfer data.

    Umasankar k