TMS320F28069: SCI received overflow but did not enter interrupt

//###########################################################################
//
// FILE:   Example_2806xSci_FFDLB_int.c
//
// TITLE:  SCI Digital Loop Back with Interrupts Example
//
//!  \addtogroup f2806x_example_list
//!  <h1>SCI Digital Loop Back with Interrupts(scia_loopback_interrupts)</h1>
//!
//!  This program uses the internal loop back test mode of the peripheral.
//!  Other then boot mode pin configuration, no other hardware configuration
//!  is required. Both interrupts and the SCI FIFOs are used.
//!
//!  A stream of data is sent and then compared to the received stream.
//!  The SCI-A sent data looks like this: \n
//!  00 01 \n
//!  01 02 \n
//!  02 03 \n
//!  .... \n
//!  FE FF \n
//!  FF 00 \n
//!  etc.. \n
//!  The pattern is repeated forever.
//!
//!  \b Watch \b Variables \n
//!  - \b sdataA , Data being sent
//!  - \b rdataA , Data received
//!  - \b rdata_pointA ,Keep track of where we are in the datastream.
//!    This is used to check the incoming data
//
//###########################################################################
// $TI Release: F2806x Support Library v2.06.00.00 $
// $Release Date: Fri Feb 12 19:15:11 IST 2021 $
// $Copyright:
// Copyright (C) 2009-2021 Texas Instruments Incorporated - http://www.ti.com/
//
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// modification, are permitted provided that the following conditions 
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// 
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//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
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//   distribution.
// 
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//   its contributors may be used to endorse or promote products derived
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// 
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

//
// Defines
//
#define CPU_FREQ    90E6
#define LSPCLK_FREQ (CPU_FREQ/4)
#define SCI_FREQ    100E3
#define SCI_PRD     ((LSPCLK_FREQ/(SCI_FREQ*8))-1)

//
// Function Prototypes
//
__interrupt void sciaTxFifoIsr(void);
__interrupt void sciaRxFifoIsr(void);
__interrupt void scibTxFifoIsr(void);
__interrupt void scibRxFifoIsr(void);
void scia_fifo_init(void);
void scib_fifo_init(void);
void error(void);

//
// Globals
//
Uint16 sdataA[5];    // Send data for SCI-A
Uint16 rdataA[5];    // Received data for SCI-A
Uint16 rdata_pointA; // Used for checking the received data
Uint16 overflow_test=0;
Uint16 overflow_count=0;

//
// Main
//
void main(void)
{
    Uint16 i;

    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the F2806x_SysCtrl.c file.
    //
    InitSysCtrl();

    //
    // Step 2. Initalize GPIO:
    // This example function is found in the F2806x_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
    //InitGpio();
    
    //
    // Setup only the GP I/O only for SCI-A and SCI-B functionality
    // This function is found in F2806x_Sci.c
    //
    InitSciGpio();

    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
    DINT;

    //
    // Initialize PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the F2806x_PieCtrl.c file.
    //
    InitPieCtrl();

    //
    // Disable CPU interrupts and clear all CPU interrupt flags
    //
    IER = 0x0000;
    IFR = 0x0000;

    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in F2806x_DefaultIsr.c.
    // This function is found in F2806x_PieVect.c.
    //
    InitPieVectTable();

    //
    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file.
    //
    EALLOW;  // This is needed to write to EALLOW protected registers
    PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
    PieVectTable.SCITXINTA = &sciaTxFifoIsr;
    EDIS;   // This is needed to disable write to EALLOW protected registers

    //
    // Step 4. Initialize all the Device Peripherals
    // This function is found in F2806x_InitPeripherals.c
    //
    //InitPeripherals(); // Not required for this example
    scia_fifo_init();  // Init SCI-A

    //
    // Step 5. User specific code, enable interrupts
    //

    //
    // Init send data.  After each transmission this data
    // will be updated for the next transmission
    //
    for(i = 0; i<5; i++)
    {
        sdataA[i] = i;
    }

    rdata_pointA = sdataA[0];
    
    //
    // Enable interrupts required for this example
    //
    PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
    PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT1
    PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2
    IER = 0x100;                         // Enable CPU INT
    EINT;

    //
    // Step 6. IDLE loop. Just sit and loop forever (optional)
    //
    for(;;)
    {
//        for(i=0; i< 5; i++)
//        {
//            SciaRegs.SCITXBUF=sdataA[i];     // Send data
//        }

//        if(SciaRegs.SCIFFRX.bit.RXFFOVF ==1)
//          {
//              error();
//
//          }

    }
}

//
// error - 
//
void
error(void)
{
   __asm("     ESTOP0"); // Test failed!! Stop!
    for (;;);
}

//
// sciaTxFifoIsr - 
//
__interrupt void
sciaTxFifoIsr(void)
{
    Uint16 i;

    for(i=0; i< 4; i++)
    {
        SciaRegs.SCITXBUF=sdataA[i];     // Send data
    }
//    for(i=0; i< 2; i++)                 //Increment send data for next cycle
//    {
//        sdataA[i] = (sdataA[i]+1) & 0x00FF;
//    }

    SciaRegs.SCIFFTX.bit.TXFFINTCLR=1;  // Clear SCI Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

//
// sciaRxFifoIsr - 
//
__interrupt void
sciaRxFifoIsr(void)
{
    Uint16 i;

    if(SciaRegs.SCIFFRX.bit.RXFFOVF ==1)
    {
         overflow_test = 0;
         SciaRegs.SCICTL1.all = 0x0023;
         SciaRegs.SCIFFTX.bit.TXFIFOXRESET = 1;
         SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;
         overflow_count++;


    }
    if(overflow_test ==0)
    {
        for(i=0;i<1;i++)
            rdataA[i]=SciaRegs.SCIRXBUF.all;  // Read data
    }
//    for(i=0;i<2;i++)                     // Check received data
//    {
//       if(rdataA[i] != ( (rdata_pointA+i) & 0x00FF) )
//       {
//           error();
//       }
//    }

    rdata_pointA = (rdata_pointA+1) & 0x00FF;

    SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
    SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

    PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
}

//
// scia_fifo_init - 
//
void
scia_fifo_init()
{
    //
    // 1 stop bit,  No loopback, No parity,8 char bits, async mode, 
    // idle-line protocol
    //
    SciaRegs.SCICCR.all =0x0007;
    
    //
    // enable TX, RX, internal SCICLK, Disable RX ERR, SLEEP, TXWAKE
    //
    SciaRegs.SCICTL1.all =0x0003;
    SciaRegs.SCICTL2.bit.TXINTENA =0;
    SciaRegs.SCICTL2.bit.RXBKINTENA =1;
    SciaRegs.SCIHBAUD = ((Uint16)SCI_PRD) >> 8;
    SciaRegs.SCILBAUD = SCI_PRD;
    SciaRegs.SCICCR.bit.LOOPBKENA =1;   // Enable loop back
    SciaRegs.SCIFFTX.all=0xC024;
    SciaRegs.SCIFFRX.all=0x0024;
    SciaRegs.SCIFFCT.all=0x00;

    SciaRegs.SCICTL1.all =0x0023;       // Relinquish SCI from Reset
    SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
    SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
}

//
// End of File
//