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TMS320F28377D: How can ADC EOC flag trigger interrupts in both cpu01 and cpu02

Part Number: TMS320F28377D

ADC is assigned to cpu01 and the EOC triggers adca1 interrupt in cpu01. Can I also create an adca1 interrupt in cpu02 based on the same EOC as cpu01? How do I both initialize and acknowledge/clear this interrupt in cpu02?

  • Rachael,

    Yes, the ADC interrupt signal is simultaneously available to the respective PIE module of both CPUs.

    With the ADC assigned to CPU1:

    • Enable the relevant global + PIE interrupt settings for both CPUs
    • The CPU1 ISR() is responsible for servicing both the ADC and PIE interrupt states
    • The CPU2 ISR() is responsible for servicing the PIE interrupt state

    -Tommy