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TMS320F28377S: ADC conversion time

R H
Prodigy 50 points

Part Number: TMS320F28377S

Hi,

Sysclk = 50 MHz used, Vref = 3 V

//-------------------------------------------ADC configuration:-------------------------------------------------------------------

    EALLOW;

    AdcaRegs.ADCCTL2.bit.PRESCALE = 1

    AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);

    AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;

    AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;

    DELAY_US(1000);

    EDIS;

    acqps = 30;

    EALLOW;

    AdcaRegs.ADCSOC0CTL.bit.CHSEL = 2; 

    AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps;

    AdcaRegs.ADCSOC1CTL.bit.ACQPS = acqps;

    AdcaRegs.ADCSOC2CTL.bit.CHSEL = 2; 

    AdcaRegs.ADCSOC2CTL.bit.ACQPS = acqps;

    AdcaRegs.ADCSOC3CTL.bit.CHSEL = 2; 

    AdcaRegs.ADCSOC3CTL.bit.ACQPS = acqps;

    AdcaRegs.ADCSOC4CTL.bit.CHSEL = 2; 

    AdcaRegs.ADCSOC4CTL.bit.ACQPS = acqps;

    AdcaRegs.ADCSOC5CTL.bit.CHSEL = 2; 

    AdcaRegs.ADCSOC5CTL.bit.ACQPS = acqps;

    AdcaRegs.ADCSOC6CTL.bit.CHSEL = 2; 

    AdcaRegs.ADCSOC6CTL.bit.ACQPS = acqps;

    AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 6;

    AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;  

    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

    EDIS;

//--------------------------------------------------------------------------------------------------------------

 

Uint16 adc_count = 0, main_count=0;

Main for(;;) loop:

{     

           // when ADC voltage > 1 V at ADC pin is given, below condition executed once using flag variable:

           {

               main_count = 0;

               GpioDataRegs.GPCSET.bit.GPIO67 = 1;

           }

       main_count++; 

       ADC_read();

       if(adc_count > 1100)

       {

        GpioDataRegs.GPCCLEAR.bit.GPIO67 = 1;

        // Observed main_count using breakpoint; value found to be 29

       }     

 

}     

Uint16 ADC_read()

{

       EALLOW;

       AdcaRegs.ADCSOCPRICTL.bit.SOCPRIORITY = 0x01;

       EDIS;

       AdcaRegs.ADCSOCFRC1.all = 0x007F;     

       DELAY_US(10);

       if(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 1)

       {

             AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

             adc_count = ADC_Result();

       }

}

 

Uint16 ADC_Result()

{

       // average of ADCa result 0 to 6

}

//------------------ questions ----------------

1. Pin toggled when ADC voltage changed from 0 to 3 V takes 800 us (on to off pulse duration). Why so much time and how to reduce this.

2. ADC_read() executes twice before observing ADC result matching to given voltage. why is there delay? why ADC result not fetched on first event.

Please guide

  • 0
    TI__Guru* 84570 points

    RH,

    For the settings you have above(SYSCLK = 50MHz and ADCCLK = 25MHz) with ACQPS = 30, 6 conversions should take 13.02us to complete.

    I think the issue is the DELAY_US(10) inside the ADC Read function and "if" conditional.

      Since ADC will not be done after the 10us of delay then it will exit the function and go back to the main and then re-trigger the ADC and wait another 10us before checking that the flag is set(it already was).

    This explains both the increased time and the double function call.

    You should remove the DELAY_US(10) in the ADC read, and replace the

    if(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 1){

    }

    with

    while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0){};

     AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

     adc_count = ADC_Result();

    This will wait until the conversions are complete before calling the averaging function. and save the extra function call and time.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Prodigy 50 points

    Hi Matthew, 

    Thanks for your inputs. Below are my observations for which your guidance is required:

    MatthewPate said:
    For the settings you have above(SYSCLK = 50MHz and ADCCLK = 25MHz) with ACQPS = 30, 6 conversions should take 13.02us to complete.

    Is it this, how it is calculated? : {[sample time ((30+1) / 25M)] 1.24u+ [conversion time (13/(25M*2))] 1.04u}*6=13.68usec

     //---------------------------------------------------------------------------------------------------------------------------------------------------------------

    1. what is the state of ADC clock when,  AdcaRegs.ADCCTL2.bit.PRESCALE = 1 (TRM shows invalid)

    2. Considering above calculations of ADC, as suggested and with below change:

    GpioDataRegs.GPCDAT.bit.GPIO67 = 1;
    AdcaRegs.ADCSOCFRC1.all = 0x007F; 
    while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0){};

    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

    GpioDataRegs.GPCDAT.bit.GPIO67 = 0;

    I'm getting below timings for GPIO67 pos ON time:

    Prescale GPIO Measured time(µs) Ideal time (µs)
    1 7.2 ?
    0 6.46 6.1600
    2 7.72 13.68

    Why is this mismatch. Please guide.

  • +1 in reply to R H
    TI__Guru* 84570 points

    RH,

    As you have shown in your reply the ADC Sample and Hold circuit is clock from CPU clock = 50MHz, while the ADC conversion time is based on ADC clock  = 25MHz in your system.

    I didn't notice the ADC Prescale setting in your original code, as you mentioned value of 1 (ADC Clock = SYSCLK/1.5) is not allowed.  I had assumed Prescale = 2, which would give ADC Clock = 50MHz/2 = 25MHz in my above math.

    What I did not account for correctly was the amount of cycles at Prescale = 2, that the ADC needs to convert.  At this setting ADC will need 10.5 ADC Clocks for each conversion.  It might be easier to translate this back into the SYSCLK domain(since ACQPS is based on this) and use 21 sysclk cycles.

    So each sample and conversion will be 31 * 1/50MHz + 21 *1/50MHz = 52 * 1/50MHz = 1.04us *6 = 6.24us, for ADC Prescale =2.  I believe I had co-mingled the timings for the converter in 16-bit mode when I gave my earlier response.

    For pre-scale of 0 this would be 31*1/50MHz + 10.5*1/50MHz = 41.5*1/50MHz = 830ns *6 = 4.98us for ADC Prescale = 0

    The difference in the above PS=2 and PS=0 = 1.26us.  If you calculate the difference in your measured values it is also 1.26us, matching real world with simulation.

    This also means that there is a constant 1.48us delay, likely a result of the polling of the ADC completion in addition to writing and prop delay of the GPIO transitioning.

    Best,
    Matthew