TMS320F28379D: Reprogramming FLASH for CPU1 and CPU2

Hello Vamsi,

Here regisers values ;

I find the cause of the issue, it's because I need to write 28 bytes, so I have an alignment issue : 

So I modify my program to use "Fapi_DataOnly" instruction, and I disabled ECC too :

    EALLOW;
    Flash0EccRegs.ECC_ENABLE.bit.ENABLE = 0x0;
    EDIS;

Before reprogramming with "Fapi_DataOnly" instructions : 

After reprogramming : 

I still have the issue. Do you know why ?

Do I need to use this instruction on CPU1 and CPU2 ? If yes when ?

CpuSysRegs.RESC.bit.WDRSn = 1;

Thanks for your support Vamsi

Regards

Hi,

The registers show that you are getting an ECC error (and hence NMI).   

Flash ECC check is enabled at power-up.  Hence, if you don't program ECC, ECC errors will occur until the application disables it at runtime. 

I would suggest you to program ECC.  Let me know if you have any questions on this.

Flash FAQs that can help:

1. [FAQ] FAQ on Flash API usage for C2000 devices: 

     https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/951668 

2. [FAQ] FAQ for Flash ECC usage in C2000 devices - Includes ECC test mode, Linker ECC options: 

     https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/951658 

Regarding your question on setting RESC's WDRSn bit:  This just helps to clear the bit.  You need to fix the root cause (ECC).

Thanks and regards,
Vamsi

Hi Vamsi,

As I explained before, I cannot program with ECC ; due to the architecture of the .HEX file, I have to program sometimes 1 word, 2 words, 3 words or 4 words.
So not compatible with 64-bit alignment.

If I don't program ECC, what's the procedure to acknowledge this error at power-up ?

Regards,

Hello Vamsi,

I proceed like you said, using a buffer to programm at once. I can program all my FLASH with Fapi_AutoEccGeneration.
I've checked before erase and after reprogramming, FLASH is well programmed.

But after FLASH reprogramming, before or after the watchdog reset, I have an Illegal ISR.
Is it because I've only programmed and run CPU1 ?
Does this line can be the issue, as I use only CPU1 to test ?

IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);

How can I know where the issue comes from ?

Thanks for your support Vamsi.

Regards,

Hi,

I can review and get back to you on Tuesday next week (Feb 1)

Thanks and regards,
Vamsi

Hi Vamsi,

Even if I use both CPUs, I have an NMI on CPU2 after the CPU1 watchdog reset. Why ?

I have the issue when I use this line on CPU1 : 

IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);

How can I find the cause of this NMi and solve it ?

It's strange because this issue happens only after a reboot caused by the watchdog reset. After a power supply reboot, both CPUs are running correctly.

Regards

Hi,

I will assign this post to our system control expert to help you on your latest questions.

Thanks and regards,
Vamsi

Hi,

electrocc said:

Even if I use both CPUs, I have an NMI on CPU2 after the CPU1 watchdog reset. Why ?

I don't think that is NMI on CPU2. Are you loading the code on CPU2 before calling BOOT command from CPU1 ? Also when you are connected to CCS, both the cores boot as per emulation boot and not normal boot. Please look for emulation boot in device TRM and set it appropriately and see if that helps.

Regards,

Vivek Singh

Hi Vivek,

I proceed like describe below : 

• Load program on CPU1
• Load program on CPU2
• Reset CPU1
• Set EMU boot mode on FLASH for CPU1
• Reset CPU2
• Run CPU2
• Run CPU1

Is that correct ?

Regards,

Hi,

Emulation boot is applicable for CPU1 as well as CPU2. If you are connecting both CPU with CCS then you need to set emulation boot for both. You can set "Emulate Standalone boot" for CPU2 (FF5A) so that it boot like normal boot process. Also you need to run CPU1 Ist and then run CPU2.

Regards,

Vivek Singh

Vivek, If I proceed like you said : 

• Load program on CPU1
• Load program on CPU2
• Reset CPU1
• Set EMU boot mode on FLASH for CPU1
• Reset CPU2
• Set EMU boot mode on FLASH for CPU2
• Run CPU1
• Run CPU2

My program doesn't run.

If I proceed like below, program runs ; do you know why ?

• Load program on CPU1
• Load program on CPU2
• Reset CPU1
• Set EMU boot mode on FLASH for CPU1
• Reset CPU2
• Run CPU2
• Run CPU1

But after the CPU1 watchdog reset, CPU2 stops, or doesn't restart, but I don't know where. How can I know where ?

Normally with this line, CPU2 has to reboot on FLASH after a reset ?

IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);

RESC register = 0xC0000000, so I don't have NMI anymore.

Regards,

Hi Vivek,

Any update ?

Regards,

The step I mentioned will only work if you do not have any handshake between CPU1 and CPU2 (like waiting for IPC flags). If you have that then you should not reset CPU2 after running CPU1. It all depends on flow of your code. Correct way to set the dual core project is to issue boot command from CPU1 to CPU2 after CPU1 has setup all the GPIO and other system configuration like clock/memory etc. Then CPU1 should wait wait for BOOT status from CPU2 (CPU2 code should send the BOOT status to CPU1) and then both  can start running their individual tasks. The steps you are using is ok as long as CPU2 is not using any system configuration before CPU1 set it up (e.g. global shared RAMs are accessible from CPU1 only by default. CPU2 can only execute or write to it once CPU1 code enables access to CPU1).

Hope it's clear.

Regards,

Vivek Singh

Hi Vivek,

There's 2 points : 

- One is an issue in for launching programs in emulation mode
- The other one is a reboot issue after a CPU1 watchdog reset.

If we focus only on the second one, is it below the good way to proceed ?

On CPU1 side : 

- IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
- wait for CPU2 boot status (using IpcRegs.IPCBOOTSTS register) ?

On CPU2 side : 

- Send boot status to CPU1 (using IpcRegs.IPCBOOTSTS register) ?

That's right ?

If I summarize : 

- After a power supply switching-off, my program restart correctly.
- After a CPU1 watchdog reset, it doesn't.

What can be the difference between these 2 cases ?! I just want to understand what is changing between a power-off reboot and a CPU1 watchdog reset on CPU2 side.

I'm sorry, it's not clear for me.

Regards,

Hi,

This is very strange. There is not much difference between power on and CPU1 watchdog reset for device boot. I hope you are not driving the BOOTMODE pins from some external driver which keep it driving when CPU1 watchdog reset happens but stops driving in case of power cycle the board.

Is it possible for you to provide a sample test code for this issue and send it to me which I can run on my setup here ? Also do you have any FAE working with you on this ? 

Regards,

Vivek Singh

Hi Vivek,

Yes, it looks stange.
On my hardware, BOOTMODE pins are connected to Vcc permanently to use Flash mode : 

I made a test ; if I remove all IPC functions, the line below and if I load only CPU1 program, CPU1 program restart after a watchdog reset. Look like it's linked to CPU2, are you agree ? But I don't understand why everything works fine after a power on, but not after a watchdog reset.

IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);

If we don't find the issue with information above, I could send you a sample test code,but it will takes time to modify my source code.

Regards,

electrocc said:

But I don't understand why everything works fine after a power on, but not after a watchdog reset.

I am assuming that after power cycle, you do not connect CCS but it works standalone. Correct ? 

Also in case of WD reset, are you connected to CCS ? Or that is also in standalone mode and you know by some GPIO toggle that WD has issued reset. 

Yes, it looks like there is some synchronization issue with CPU1/CPU2. 

Did you look at my request of creating sample project which I can run at my setup here.

Regards,

Vivek Singh 

Hi Vivek,

Vivek Singh said:

Also in case of WD reset, are you connected to CCS ? Or that is also in standalone mode and you know by some GPIO toggle that WD has issued reset. 

I've tried both case. In standalone mode, I know that watchdog has issue reset because I use a led. (led is toggled during my program execution, led is OFF then ON if a Reset is executed).

I send you the project in private.

Regards,

Ok, thanks. Will try the project and let you know if I am able to reproduce it.

Regards,

Vivek Singh

Vivek,

Just to summarize, because I think there's a misunderstanding ; I will first explain tests I maid and then ask questions :

2 tests (in standalone mode) and 2 different results :

1st test : 

• I programmed both CPUs
• I've run CPU1 and CPU2
• I've disconnected both CPUs (Run --> Disconnected), and exit Debug mode.
• After a switch off / switch-on, the led is blinking.
• I triggered a watchdog reset ; the led is blinking after it, so it works.

2nd test :

• I programmed both CPUs
• I've reset both CPU in CCS.
• I've run CPU1 and CPU2
• I've disconnected both CPUs (Run --> Disconnected), and exit Debug mode.
• The led is blinking.
• I triggered a watchdog reset, the led isn't blinking after it.

1°) What's the difference between a Code composer Reset (Run --> Reset --> CPU Reset) and a switch-on / switch-off reset ?
2°) After a watchdog reset on CPU1, wait is CPU2 boot mode ? Wait ? Flash ?

Thanks for your support.

Regards

Hi,

This detail was helpful.

electrocc said:

1°) What's the difference between a Code composer Reset (Run --> Reset --> CPU Reset) and a switch-on / switch-off reset ?

There is big difference between CCS reset and power on reset (switch-on/switch-off). CCS reset only reset CPU subsystem and it does not reset logic reset by XRSn or power on reset. Power on reset also resets the JTAG lock and terminate the CCS connection which does not happens on CCS reset or XRSn. 

How are you disconnecting CCS ? Are you just clicking on disconnect or terminating the full debug session ? If only clicking on disconnect then try terminating the full debug session and see if that helps. 

Regards,

Vivek Singh 

Hello Vivek,

I disconnect CCS (Run --> Disconnected) then I click on Terminate session (red square).
I will not use anymore the CCS reset, but only the power on reset.

I made another test (I use and program only CPU1 and I erase CPU2 FLASH) ; CPU1 doesn't restart after a FLASH rewriting + watchdog reset but : 

• If I comment the FLASH reprogramming part (I only use the watchdog reset to reboot), CPU1 reboot after it.
• I checked that FLASH writing function is done correctly ; all the FLASH has the same value before and after reprogramming.

If I comment the line below in my Initialization function, CPU1 reboot after the FLASH writing + watchdog reset.

IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);

I need to use this line because I'll use both CPUs in my final program.

1°) Why does this line can affect my CPU1 program, even if CPU2 is not programmed ? 
2°) Why doesn't this line affect my CPU1 program after a power-on reboot, but affect my program after a FLASH writing + watchdog reset ?
2°) I put this function at the end of my CPU1 initialization to avoid ressources conflicts between CPU1 and CPU2 ; is it the good way to proceed ?
3°) If I do a power on reset after the watchdog reset, CPU1 doesn't restart either. Why ?

Thanks for your support.

Regards,

I have sent you a personal reply.