TMS320F280049C: Shadow register in counter compare register

Hi Subrahmanya,

Thanks for your verification.

One more questions, is it specifically written that the action of shadow to active in counter compare register takes no latency in TRM ?

For F28004x TRM, in page.1792. It is only written that updates to the registers synchronized with the hardware, do I know from this sentense ?

The customer would like to know where the sentense clearly specify no latency in the TRM ? Since this is their first time to study C2000.

Thanks for any help.

Best Regard, Johnny

Hi,

I want to understand your question and concern further.

What latency are you referring to? Latency w.r.t to what event?
Shadow to active loads happen based on the event chosen for loading.
Are you asking about the latency from software updating the shadow register to that being loaded into the shadow register?

Hi Subrahmanya,

I mean when shadowing is used, the time between the timing of shadow to active load occurs and updated to the active registers with the shadow value.

It takes no time between them since it is all done by hardware, right ?

If it is correct, which sentence is to describle it in the TRM ?

Furthermore, I would also like to know what you are saying, the latency from software updating the shadow register. How much time for it ?

Thanks for your answer that helps me clarify the understanding clearly.

Best Regard, Johnny