Part Number: TMS320F28388D
Hi experts,
A data sheet (SPRSP14D – MAY 2019 – REVISED FEBRUARY 2021) describes below in 7.11.2.3.8.5 Differential Input Model
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The user should analyze the ADC input setting assuming worst-case initial conditions on Ch. This will require
assuming that Ch could start the S+H window completely charged to VREFHI or completely discharged to
VREFLO. When the ADC transitions from an odd-numbered channel to an even-numbered channel, or viceversa,
the actual initial voltage on Ch will be close to being completely discharged to VREFLO. For even-to-even
or odd-to-odd channel transitions, the initial voltage on Ch will be close to the voltage of the previously converted
channel.
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However a pair of positive(even) and negative(odd) channels are input in the differential signal mode.
For example, the following case is in the upper case (even-to-even)
1) ADCINA0+ADCINA1
2) ADCINA2+ADCINA3
Best regards,
Hidehiko
