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Original question:

TMS320F28388D: Biss-C availabaility

TMS320F28388D: 4 BISS-C encoders MCU Resource Requirements

Hal Mas
Prodigy 220 points

Part Number: TMS320F28388D
Other Parts Discussed in Thread: BOOSTXL-POSMGR, TIDM-1010, CONTROLSUITE

Hi all,

I know the SDK is not released for BISS-C Encoder using F28388D but I am planning on having multiple BISS-C encoders wired to the F2838D in the future.

I am working on a design with several GPIO accessible on a connector and I would like to make sure the non configurable/fixed pins needed for BISS-C communication are available on the connector.

First of all based on the BOOSTXL-POSMGR/TIDM-1010 with the F28379D launchpad I assume that the max number of biss-c encoders wired to the F28xxxx is 4 (using 2xBOOSTXL) :

Can you confirm we cannot have more than 4 biss-c wired to a F283xxx? What is the reason/limitation?

What does "x2 BiSS-C or other Absolute Encoder (simultaneously)" means? 

Now for the pins/ressources needed, everything is confusing and I am not sure what is configurable and what is not.

Based on the schematic of the BOOSTER and pins associated on the launchpad I got the pins listed in the table:

Enc1-CLK GPIO0
CLB-SPICLK GPIO1 CAN YOU CONFIRM
SPI1-CLK GPIO60  SPIA
SPI1-SIMO / Enc1-DI GPIO58 SPIA
SPI1-SOMI / Enc1-DO GPIO59 SPIA
Enc1-TxEn GPIO3
Enc2-CLK GPIO2
CLB-SPICLK GPIO5 CAN YOU CONFIRM
SPI2-CLK GPIO124 SPIC
SPI2-SIMO / Enc2-DI GPIO122 SPIC
SPI2-SOMI / Enc2-DO GPIO123 SPIC
Enc2-TxEn GPIO29 
Enc3-CLK GPIO6
CLB-SPICLK GPIO7
SPI3-CLK GPIO65 SPIB
SPI3-SIMO / Enc3-DI GPIO63 SPIB
SPI3-SOMI / Enc1-DO GPIO64 SPIB
Enc3-TxEn GPIO9
Enc4-CLK ?
CLB-SPICLK
SPI4-CLK ?
SPI4-SIMO / Enc4-DI ?
SPI4-SOMI / Enc4-DO ?
Enc4-TxEn ?

Could you tell me which pins is fixed vs which is configurable? I looked at the code example C:\ti\controlSUITE\development_kits\BOOSTXL_POSMGR\v01_01_00_00\bissc-F28379DLpad-S2\examples\PM_bissc_SystemTest in biss.c and I see GPIO24,25,26,27 are commented and they use GPIO63,64 and 65, so I guess I can change all SPI pins as long as SPIB stays SPIB right?

For the last encoder 4, I don't know which pin to use, SPID for SOMI SIMO CLK but what will be the dedicated Enc4-CLK Enc4-TxEn and CLB-SPICLK?

Why the schematic does not reflect the image below? I don't see the Enc-TxEn that enable the transceiver, is it a mandatory signal or it is only use if it is a bi-directional communication?

Thank you

  • 0
    TI__Guru* 93800 points
    Hal Mas said:
    Can you confirm we cannot have more than 4 biss-c wired to a F283xxx? What is the reason/limitation?

    The limitation in an end application will come from the resources on the device. 

    The LaunchPad + BoosterPack combination is an evaluation platform and may have limitations based on the pinout of the board along with the resources on a specific device.   Some effort is made to keep the LaunchPad pinout compatible across device families, but it is not always possible. 

    Note you mentioned the F2838x family.  This device family does not have a launchpad evaluation platform. 

    Hal Mas said:
    Could you tell me which pins is fixed vs which is configurable? I looked at the code example C:\ti\controlSUITE\development_kits\BOOSTXL_POSMGR\v01_01_00_00\bissc-F28379DLpad-S2\examples\PM_bissc_SystemTest in biss.c and I see GPIO24,25,26,27 are commented and they use GPIO63,64 and 65, so I guess I can change all SPI pins as long as SPIB stays SPIB right?

    The boosterpack is designed to handle more than one protocol - T-format, EnDat, BiSS.. so not all connections may be used by a specific protocol. 

    As provided, the library for the F28379D example uses the connections shown below - I pulled the diagram from the LaunchPad User's Guide.

    • Tile requirements:
      • A BiSS instance uses 2 CLB tiles.  In the example library it uses Tile 3 and Tile 4.   This has some influence over the pins uses (see ePWM4A/B selection below)

    In general, for these encoders:

    • ePWM4A/B.
      • Tile 4 output 0 is able to override ePWM4A and Tile 4 output 2 can override ePWM4B outputs - these were chosen as it was convenient and the trip functionality could be leveraged to set the initial value.
      • Note: this changes based on tile # - Tile1 can override ePWM1A/B, Tile2 ePWM2A/B etc up to 4.  Refer to the CLB chapter of the device-specific Technical Reference Manual (TRM) for connection capabilities.
      • EPWM4B has to be tied to the SPICLK of the SPI instance being used.  In this case SPIB.  The CLB drives this clock.

    • GPIO9 is a GPIO accessed by the CLB via the OUTPUTXBAR.  CLB output 4 and output 5 (on any tile) can be connected to the OUTPUTXBAR.  In this case it is Tile 3 accessing this.  Refer to the CLB TRM chapter.

    Regards

    Lori