TMS320F280025: HRPWM configuration

Hung Kai Woo1

Part Number: TMS320F280025

I am using a demo code "hrpwm_ex2_prdupdown_sfo_v8" and tried to generate a PWM @ 585.XXHz. I used a function HRPWM_Config(10667) and change below parameter from

(*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
(*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV1; // TBCLK = SYSCLKOUT

(*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV4;
(*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV4; // TBCLK = SYSCLKOUT

However, EPWM1A is always 100% duty. I have tried different parameters. Only using original parameter can generate PWM @ 4.96KHz. Please advise do I miss something.

HK Woo

over 4 years ago

0 Nima Eskandari over 4 years ago

TI__Guru 52040 points

The only thing you are changing is the EPWM CLK divider settings? everything else is identical?

0 Hung Kai Woo1 over 4 years ago in reply to Nima Eskandari

Intellectual 825 points

Yes

I just changed 2 divider settings

0 Nima Eskandari over 4 years ago in reply to Hung Kai Woo1

TI__Guru 52040 points

What does that make you EPWM frequency?

0 Hung Kai Woo1 over 4 years ago in reply to Nima Eskandari

Intellectual 825 points

Both EPWM1A and 1B is high state. Actually I want to have PWM @ 195.3125Hz

0 Nima Eskandari over 4 years ago in reply to Hung Kai Woo1

TI__Guru 52040 points

Okay its making sense now. HRPWM has a minimum clock frequency requirement of 60MHz. This is noted in the TRM and datasheet.

0 Hung Kai Woo1 over 4 years ago in reply to Nima Eskandari

Intellectual 825 points

Is it mean that I cannot generate hi resolution @ the frequency? I don’t understand. I change the value of divider and it affects clock speed

0 Nima Eskandari over 4 years ago in reply to Hung Kai Woo1

TI__Guru 52040 points

Your EPWM clock cannot be less than 60MHz. You can set the EPWM clock to be higher than 60 MHz, then use the TBPRD register to divide down the TBCTR clock.

0 Hung Kai Woo1 over 4 years ago in reply to Nima Eskandari

Intellectual 825 points

Sorry. I am very new to the MCU. I changed both divider to 4. It is means that the EPWM clock become 100Mhz/16 = 6.25Mhz and hence it cause the problem. Is it correct?

0 Nima Eskandari over 4 years ago in reply to Hung Kai Woo1

TI__Guru 52040 points

Correct, but there may be other mistakes in the configuration. I recommend that you use the driverlib examples instead which will help you avoid some more programming mistakes.

Do you know where to find the driverlib examples?

0 Hung Kai Woo1 over 4 years ago in reply to Nima Eskandari

Intellectual 825 points

Yes, I can find the example.

Regarding to EPWM clock, it means that the only one configuration of both dividers is 1 only, no other choice if I want to use high resolution. Is it correct?

HK Woo

+1 Nima Eskandari over 4 years ago in reply to Hung Kai Woo1

TI__Guru 52040 points

For this device that is correct. You can have it lower than 60MHz for HRPWM.

Nima

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TMS320F280025: HRPWM configuration