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TMS320F280049: Program run into a not enabled interrupt

Part Number: TMS320F280049

Dear team:

After my customer sets the CPU fetch protection for "ramg0", the program will enter the illegalisr (), but then the program will enter the SCIA again_ RX_ ISR()。 However, the interrupt is not enabled in his program, and the read pieier is also closed. Why jump into the interrupt?

__interrupt void illegalISR(void)
{
illegalISRFlag = true;


MemCfg_setProtection(MEMCFG_SECT_GS0, MEMCFG_PROT_ALLOWCPUFETCH);

}

Best regards

  • Hi Green, Thanks for reaching out.  Please expect a delay in reply due the long weekend in observance of Dr. Martin Luther King day.  Regards, Krishna

  • Hi, 

    Can you debug your code by putting a breakpoint in the illegal ISR? In CCS, when you encounter the Illegal ISR, you can look at the Debug window and see where the code was. The Debug window should show you where the code was according to the stack.

    Best Regards

    Siddharth

  • as shown in the picture, it enter the system function SCIA again_ RX_ ISR(), and stops there. SCIA again_ RX_ ISR() has the  'RSTOP0' break

    but that is not enabled. 

  • Hi, 

    Does it not return from the illegal_ISR()? 

    Can you single step through the generateMasterCPUFetchViolation function ?

    Also , pls share the disassembly snapshot of the illegal_ISR

    Best Regards

    Siddharth

  • when i go single step,make breakpoint in  illegalISR(), it will go into illegalISR() and stuck in the  illegalISR(). then i disable the breakpoint, it will run into the default ISR for tms280049, and stop there.

    #pragma CODE_SECTION(testCPUFetchFunc,"ramls4");//ramgs0
    void testCPUFetchFunc(void);

    uint32_t generateMasterCPUFetchViolation()
    {
    fail = 0U;
    timeout = ISR_LOOP_TIMEOUT;

    //
    // Enable violation interrupt
    //
    MemCfg_enableViolationInterrupt(MEMCFG_MVIOL_CPUFETCH);

    //
    // Set fetch protection which generates master CPU fetch violation in
    // case of CPU fetch.
    //
    MemCfg_setProtection(MEMCFG_SECT_LS4, MEMCFG_PROT_BLOCKCPUFETCH);//MEMCFG_SECT_LS1

    //
    // Clear access violation status variables
    //
    illegalISRFlag = false;
    violationISRFlag = false;
    violationAddr = 0U;
    violationStatus = 0U;

    //
    // Calling this function (which has been placed in LS1) will cause a CPU
    // fetch access violation.
    //
    testCPUFetchFunc();

    //
    // The violation will generate both an ITRAP interrupt and the RAM access
    // violation interrupt.
    //
    while(((illegalISRFlag != true) || (violationISRFlag != true)) &&
    (timeout != 0U))
    {
    timeout--;
    }

    //
    // Disable interrupt.
    //
    MemCfg_disableViolationInterrupt(MEMCFG_MVIOL_CPUFETCH);

    //
    // Check if interrupt occurred as expected or if the loop timed out.
    //
    if(timeout == 0U)
    {
    fail++;
    }

    //
    // Check if the violation address was testCPUFetchFunc().
    //
    if(violationAddr != (uint32_t)&testCPUFetchFunc)
    {
    fail++;
    }

    //
    // Confirm the expected violation type was detected.
    //
    if((violationStatus & MEMCFG_MVIOL_CPUFETCH) == 0U)
    {
    fail++;
    }

    return(fail);
    }

    void testCPUFetchFunc(void)
    {
    NOP;
    }

    __interrupt void illegalISR(void)
    {
    illegalISRFlag = true;

    //
    // Need to remove the protection on LS1RAM to allow us to return.
    //
    MemCfg_setProtection(MEMCFG_SECT_LS4, MEMCFG_PROT_ALLOWCPUFETCH);

    }

    ...

  • Hi, 

    Earlier you mentioned that it is entering SCI ISR , and not it is enter ADCA1_ISR.  

    Can you share your CCS project and code to reproduce the issue that you are seeing? 

    Best Regards

    Siddharth