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TMS320F28377D-EP: CLLLC

huang bin
Prodigy 70 points

Part Number: TMS320F28377D-EP
Other Parts Discussed in Thread: TIDM-02002, TMS320F28377D

Dear TI:

         1、On the TIDM-02002 design, in the function CLLLC_HAL_setupSynchronousRectificationAction, there is a code CMPSS_configLatchOnPWMSYNC(CLLLC_ISEC_TANK_CMPSS_BASE, TRUE, TRUE); as my understanding, This code configures whether or not the digital filter latches in both the high and low comparators should be reset by EPWMSYNPER. but I can not find the configuration of EPWMSYNPER in the whole project.

        2、I designed a dual active CLLLC project based on TIDM-02002 with TMS320F28377D, which works around 200kHz without high-resolution pwm function. According to the TMS320F28377D TRM datasheet, the Figure 15-54. Event Filtering illustrates the EPWMBLANK signal does not go to CMPSS. Could you please introduce some methods to achieve the same function as EPWMBLANK to hold the CMPSS trip latch in reset for several timebase clock.

  • 0
    TI__Mastermind 42195 points

    1. I'll have to look at this.

    2. correct the blanking window was not added on this device. If you are open to an non-EP part F28388D should have this feature. The closest thing this device has is described in 15.11.3 Using CMPSS to Trip the ePWM on a Cycle-by-Cycle Basis.

    Regards,
    Cody 

  • 0 in reply to Cody Watkins
    Prodigy 70 points

    Cody:

         Since TIDM-02002 tank current CMPSS is configured as CBC trip ,  but there is no configuration of TZSEL[DCAEVT2, DCBEVT2] in  the  CLLLC_HAL_setupSynchronousRectificationAction function.

  • 0 in reply to huang bin
    TI__Mastermind 42195 points

    Huang Bin,

    in CLLLC_hal.c on line 70 you can see CMPSS_O_COMPDACCTL is set to a value of 0x1E.

    This configures the EPWMSYNCPER for the CMPSS.

    Some of these pieces of code are difficult to read and understand. You will need to take some time and read though the code.

    Regards,
    Cody 

  • 0 in reply to Cody Watkins
    Prodigy 70 points

    Cody ,

         CMPSS_O_COMPDACCTL is set to a value of 0x1E, which means  COMPDACCTL[RAMPSOURCE] is set to "1111", therefore, 

    EPWM15SYNCPERis selected. correct? but there is no configuration of EPWM15SYNCPER..

         as my understanding, EPWMSYNCPER comes from the Time-Base submodule of the EPWM. if i want to generate EPWMSYNCPER signal , i need to configure  HRPCTL Register, but there is no configuration of  HRPCTL Register.

  • 0 in reply to huang bin
    TI__Mastermind 42195 points

    That would be ePWM 16 I believe, 0 is ePWM1, so 15 is ePWM 16.

    Regards,
    Cody