TMS320F28035: Interrupt response time jitter of DPL_ISR

Hi,

To further help with your question, Is this ISR located as part of an example provided by TI? If so, can you provide more information about the definition of this ISR.

Hi Ozino,

Thanks for your reply.

DPL_ISR is a part of ti\controlSUITE\development_kits\HVPSFB_v1.1\HVPSFB_PCMC. This is my code.

EALLOW;
//Time Base SubModule Register
EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE; // Set Immediate load
EPwm1Regs.TBPRD = HSFB_PERIOD;
EPwm1Regs.TBPHS.half.TBPHS = 0;
EPwm1Regs.TBCTR = 0;

EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_CMPB; // Used to sync EPWM(n+1) "down-stream"
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

// Counter compare submodule registers
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_IMMEDIATE;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_IMMEDIATE;
EPwm1Regs.CMPA.half.CMPA = HSFB_PERIOD-DB_S2P_FALLING;//
EPwm1Regs.CMPB = HSFB_PERIOD;

// Action Qualifier SubModule Registers
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;
EPwm1Regs.AQCTLA.bit.PRD = AQ_CLEAR;

// DeadBand Control Register
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi Complimentary
EPwm1Regs.DBRED = DB_A2B; // Initial value
EPwm1Regs.DBFED = DB_A2B;

_DPL_ISR: ;CONTEXT_SAVE

;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
; Following is a time critical part and this code should not be modified or re-ordered.
; If extra code nees to be added to the ISR, it should be located after the time critical code.
;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

; full context save - push any unprotected registers onto stack
PUSH AR1H:AR0H
PUSH XAR2
PUSH XAR3
PUSH XAR4
PUSH XAR5
PUSH XAR6
PUSH XAR7
PUSH XT
NOP

;-----------------------------------------------------------------------------------------

;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
;==================================================================
; Check TBCNT1 to know which half cycle we are in
; Please Note amount of time it takes to get here is highly critical
;==================================================================

EALLOW
MOVW DP,#_EPwm1Regs.TBSTS
MOV AL,@_EPwm1Regs.TBSTS

MOVW DP, #0x1bf
OR @0xe, #0x0004;toggle gpio34

I test PWM1A  and GPIO34, jitter is about 200ns.

I found a similar thread on the forum, unfortunately ended up with no results.

TMS320F28035 ePWM interrupt jitter or something else - C2000 microcontrollers forum - C2000︎ microcontrollers - TI E2E support forums

Thanks for the additional information. I'm going to go ahead and have your forum post rerouted to the appropriate owners.

Hi,

This should not happen theoretically. I am not the original s/w designer so I just come up with some potential reasons.

Is your GPIO toggling code placed at the very beginning of the ISR? Is that possible other code in the ISR are not executing each ISR cycle(for example, some if else)? And you may also check the ISR trigger source to see if that is consistent with your PWM1A timewise. 

Regards,

Chen