Hi, From a Picollo 28027 I transfered my code to a prototype board with the 28022.
Now I see a lot of ADC noise upto 100 bits! When I lower the Sysclk from 50 to 30 MHz the ADC noise becomes normal: 4 bits. It seems a timing problem with the ADC periferal. At 35Mhz and faster the bit 5 of all ADC results stays '0' this generates the hifh noise.
Can any one advice me how to run al 50 MHz and make the ADC quite to 4 bit noise?
I also use the Highres PWM, which needs 40 MHz.