Other Parts Discussed in Thread: C2000WARE
Hi
I am using the SOGI based 1PH PLL block from digital power sdk in my GT inverter project.
AC frequency=50Hz
ISR frequency = 20k
Grid frequency varies between around 49.78Hz to 50.25Hz
calculated b0 and b1 values as mentioned in the guide.
But i get a phase error when the grid frequency is 50.Hz and it get worse when frequency increases further. Frequencies below 50Hz doesn't cause the error. Even in 49.8Hz it gives correct phase.
Changed the b0 and b1 values to see if there any changes and nothing changed.
But i noticed that when i insert 50.2Hz instead of 50Hz as the AC frequency, the error happening point shifts further.
Now it gives correct phase at 50Hz. But again an error appear when frequency in increasing, but this time it happens further ahead frequency value than the previous case.
This is really bad since i use PR harmonic controllers in my project, Harmonic controllers works fine with the correct phase value.
But when the above happens, harmonic controllers adds harmonics to the output instead of reducing it.
What is the cause of this.
Also i don't understand what the "k" value does to this PLL code.
Regards
Damith
