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TMS320F28377D: IPC boot using the Device_bootCPU2 function.

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

Dear TI Hello,

I am working on the IPC peripheral and I have many questions about the Device_bootCPU2 function used to control the boot for the cpu2.

  1. I don't understand the process boot of the cpu2, does the cpu2 boot after power up?
  2. In the Device_bootCPU2 function, I notice that we wait until the CPU2 control system boot?  Normally this function is called before any intervention from CPU1, the question is how cpu1 should wait when it doesn't know when cpu2 has started? If the cpu2 is already started why the function is not reset cpu2?
  3.     //
        // Loop until CPU02 control system IPC flags 1 and 32 are available
        //
        while (((HWREG(IPC_BASE + IPC_O_FLG) & IPC_FLG_IPC0)  != 0U) ||
               ((HWREG(IPC_BASE + IPC_O_FLG) & IPC_FLG_IPC31) != 0U))
        {
    
        }
  4. The reception of the two flags 1 and 32 means what? the Cpu2 will set these flags due to what?
  5. I could understand also why TI set the IPCSET register "HWREG(IPC_BASE + IPC_O_SET) = 0x80000001U"?
  6.         //
            //CPU01 to CPU02 IPC Boot Mode Register
            //
            HWREG(IPC_BASE + IPC_O_BOOTMODE) = bootMode;
    
            //
            // CPU01 To CPU02 IPC Command Register
            //
            HWREG(IPC_BASE + IPC_O_SENDCOM) = BROM_IPC_EXECUTE_BOOTMODE_CMD;
    
            //
            // CPU01 to CPU02 IPC flag register
            //
            HWREG(IPC_BASE + IPC_O_SET) = 0x80000001U;

In the reference manual, I am looking for information related to the set of the IPCSET register but I didn't find any information, could help with it, please?

Thank you in advance,

S.Tarik

  • Tarik,

    The IPC boot flow is listed below in TRM:

    https://www.ti.com/lit/ug/spruhm8h/spruhm8h.pdf 

    There is an example in C2000Ware which illustrates.  The example is located at:

    C;/ti/c2000/C2000Ware_3_04_00_00/device_support/f2837xd/examples/dual/ipc_gpio_toggle

    Use the Stand alone flash configuration for CPU1, and flash configuration for CPU2.

    Have you already looked into this?

  • Hello Jha,

    I have a question please, I imported the project but I don't understand the difference between standalone and not standalone boot in the following code.

    #ifdef _STANDALONE
    #ifdef _FLASH
        // TODO check to see if this breaks.
        Device_bootCPU2(BOOTMODE_BOOT_TO_FLASH_SECTOR0);
    #else
        // TODO this breaks the RAM build.
        Device_bootCPU2(BOOTMODE_BOOT_TO_M0RAM);
    #endif
    #endif

    Regards,

    S.Tarik

  • Hi Tarik,

    In CPU1_FLASH_STANDALONE build configuration, two symbols are defined, _STANDALONE, and _FLASH. With that code, CPU2 is booted from Flash Sector0. The details of implementation you can check inside the function Device_bootCPU2().

    So the difference is that it will boot from Flash_sector0 vs M0RAM.