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SM320F2801 Won't boot from flash

Hi,

I've got all my code running and I run from flash just fine if I boot from JTAG through Code Composer v4.  When I turn off power and try to boot the 2801 doesn't boot. 

I read through SPRA958 and noticed in section 4.1 that I need to copy the PIE Vector Table to RAM.  I'm not doing this yet that I know (unless it's buried in the TI supplied headers/.c files) so I tried inserting the code shown into my main.c.  The compiler came back and stated it couldn't find &PieVectTableInit.  I know it's in the PieVect.c file but my main doesn't see it.

Should this code go into the PieVect.c file?

Is this code really needed since I'm already running out of flash when booting from JTAG?

Please help.  This is my last problem to solve before I deliver to my customer.

Update:

I just noticed  I'm not doing all of section 4.4 (of SPRA958) either unless this also is taken care of by the TI supplied headers/.c files.  I have InitFlash in my main.c and InitFlash function in my SysCtrl.c but I don't have the "User's linker command file" stuff in F2801.cmd or Headers_nonBIOS.cmd. 

Also, SPRA958 shows:

asm ("RPT #6 || NOP")

My SysCtrl.c has:

asm ("RPT # || NOP")

Is this an issue?

 

  • Update:

    My product appears to boot up and go through an initialization test where it runs my motor for 200 ms and then turns on the brake.  I'm pretty sure it is doing this because before I put in the brake it would run the motor and the motor would just spin down instead of stopping.  After I put in the brake command, the motor spins and then comes to an abrupt halt indicative of what I have in my startup test.  After that, I don't get my CAN communication. 

    I'm assuming the problem is associated with moving the PieVectTable to RAM.

    Can someone help with this?  Please refer to the above post with regards to the moving the Pie table issue.

    Thanks,

    Rick

  • Richard Shank said:

    Hi,

    I've got all my code running and I run from flash just fine if I boot from JTAG through Code Composer v4.  When I turn off power and try to boot the 2801 doesn't boot. 

    I read through SPRA958 and noticed in section 4.1 that I need to copy the PIE Vector Table to RAM.  I'm not doing this yet that I know (unless it's buried in the TI supplied headers/.c files) so I tried inserting the code shown into my main.c.  The compiler came back and stated it couldn't find &PieVectTableInit.  I know it's in the PieVect.c file but my main doesn't see it.

    Should this code go into the PieVect.c file?

    Is this code really needed since I'm already running out of flash when booting from JTAG?

    Please help.  This is my last problem to solve before I deliver to my customer.

    Richard,

    For debugging stand-alone boot I would like to suggest the debug tips on this wiki page.  Hopefully it can help narrow down the problem:

    http://processors.wiki.ti.com/index.php/C2000_Flash_Common_Issues/FAQs#Code_Does_Not_Run_Standalone

    You may want to take a look at the simple example called "flash"  included in the 280x header files and peripheral examples:

    http://focus.ti.com/mcu/docs/mcuprodcodeexamples.tsp?sectionId=96&tabId=1470

    The example is in: C:\tidcs\c28\DSP280x\v160\DSP280x_examples\flash

    In this code, the "InitPieVectTable();" initalizes the PIE vector table to default ISR routines (they don't do anything - just place holders.)

    To assign your own vector, the code is the same in RAM or in Flash - here is an example.  This changes the EPWM1_INT interrupt vector to point to the epwm1_timer_isr, and soforth.  The cut from the example is shown below:

    // Interrupts that are used in this example are re-mapped to
    // ISR functions found within this file. 
       EALLOW;  // This is needed to write to EALLOW protected registers
       PieVectTable.EPWM1_INT = &epwm1_timer_isr;
       PieVectTable.EPWM2_INT = &epwm2_timer_isr;
       PieVectTable.EPWM3_INT = &epwm3_timer_isr;
       EDIS;    // This is needed to disable write to EALLOW protected registers

    Richard Shank said:
    I just noticed  I'm not doing all of section 4.4 (of SPRA958) either unless this also is taken care of by the TI supplied headers/.c files.  I have InitFlash in my main.c and InitFlash function in my SysCtrl.c but I don't have the "User's linker command file" stuff in F2801.cmd or Headers_nonBIOS.cmd. 

    If I understand, you are not specifying a run and load address for functions that are in the ramfuncs section.  This can be a issue in particular with the InitFlash.  The flash configuration can not be changed while running from the flash itself.   Doing so can cause the code to ITRAP.  The InitFlash function needs to be loaded into flash and then copied to RAM for runtime. 

    In the C28x header files and peripheral examples, the InitFlash is assigned to the ramfuncs (different than shown in that application note).

    Richard Shank said:

    Also, SPRA958 shows:

    asm ("RPT #6 || NOP")

    My SysCtrl.c has:

    asm ("RPT # || NOP")

    Is this an issue?

    Yes, the repeat needs to be at least #6 in order to flush the pipeline.  The DSP280x_SysCtrl.c on my machine has #7.

    Regards,

    Lori

     

     

     

     

  • Richard Shank said:

    Update:

    My product appears to boot up and go through an initialization test where it runs my motor for 200 ms and then turns on the brake.  I'm pretty sure it is doing this because before I put in the brake it would run the motor and the motor would just spin down instead of stopping.  After I put in the brake command, the motor spins and then comes to an abrupt halt indicative of what I have in my startup test.  After that, I don't get my CAN communication. 

    I'm assuming the problem is associated with moving the PieVectTable to RAM.

    Can someone help with this?  Please refer to the above post with regards to the moving the Pie table issue.

    Thanks,

    Rick

    Rick

    To see if it is the vectors, I suggest trying the debug step described on this wiki:

    http://processors.wiki.ti.com/index.php/C2000_Flash_Common_Issues/FAQs#Code_Does_Not_Run_Standalone

    When stepping through the code, check the PIE vector table itself to see if the vectors are populated correctly.

    Regards,

    Lori

     

  • Hi Lori,

    Thanks for your help.  I used the debug method from the wiki and I don't really know how to "load symbols only".  I did step through the program and it appears the CAN is not working.  It works fine if I boot off of JTAG but when I recycle power the CAN stops working.  I don't have CAN in my MemCopy to ramfuncs.  I didn't see anywhere that shows how to copy the CAN to MemCopy.  Could this be the issue.

    Incidentally, there is a typo above with regards to my SysCtrl.c.  It has asm (RPT #7 || NOP").   The word formatter on this web page went nuts on me that day and I had to type it in 5 times and I missed the typo the last time.

    Thanks again,

    Rick

  • Richard Shank said:

    I did step through the program and it appears the CAN is not working.  It works fine if I boot off of JTAG but when I recycle power the CAN stops working.  I don't have CAN in my MemCopy to ramfuncs.  I didn't see anywhere that shows how to copy the CAN to MemCopy.  Could this be the issue.

    Generally differences between running code from Flash and from RAM are timing issues.  This may or may not be the case with your CAN code.  However, I recommend putting any time crictical code, particularly ISRs to run from RAM.  This is simply done by placing them in the ramfuncs section using the #pragma.

    e.g.

    #pragma CODE_SECTION(CAN_ISR, "ramfuncs")

    This will copy the code to RAM when all the rest of the ramfuncs code is copied. 

    Richard Shank said:

    Thanks for your help.  I used the debug method from the wiki and I don't really know how to "load symbols only".

    Try this (only partially tested but I think it does the trick):

    1) Target Menu -> Launch TI Debugger

    2) Target Menu -> Load Symbols.  Choose your program

    3) Target Menu -> Connect Target

     

    Tim

  • Thanks Tim but I'm running from flash.  I can boot from JTAG running out of flash and it runs fine but when I cycle power, it comes up and runs my program but I don't have CAN anymore.

    I'll try loading the CAN_ISR to ramfuncs.

  • Thanks All,

    I had to pack the unit up to ship to the customer and I'm going to the customer for a couple days tomorrow so I didn't get a chance to try the latest suggestions.  If I get time, I'll try the above at the customer's or I'll try to get to it some time next week.  We also have CDR next week so it will be busy.

    I'll get back to you as soon as I get time to test this.

    Again, thanks for the help.

    Rick

     

  • Hi Lori,

    After CDR I've been busy with my hardware to do list as I had to clean up a board and get a new one on order.  I have one final hardware test to do today and then I'm back on to software.  This issue is the first on my list.  I'll be back soon.

    Thanks,

    Rick

  • I've stepped through the initialization code from the flash entry to my "check for a CAN message" step.  I don't see anything wrong but I'm not a software guru either.  I do see where it appears I'm moving the pie vector table from flash to ram twice.  The first one was already in DSP280x_PieVect.c.  The second one is the memcpy I added because I wasn't sure the first one existed.  Here is a clip from my PieVect.c.

     

     7870.DSP280x_PieVect.pdf

     

    I'm still lost as to what the problem is.  It appears to not see a CAN input.  The code is there (not sure it is correct) but the CAN message is not recognized as being received.  Again, this works fine if I boot off the JTAG.  I can completely disconnect the JTAG after I boot and I run fine.  If I turn off power, the processor won't recognize the CAN until I boot through JTAG.  Every thing else in the code seems to work ok.

    Here is a screen shot of the C and assembly code where the code isn't working. 

  • Richard Shank said:

    I'm still lost as to what the problem is.  It appears to not see a CAN input.  The code is there (not sure it is correct) but the CAN message is not recognized as being received.  Again, this works fine if I boot off the JTAG.  I can completely disconnect the JTAG after I boot and I run fine.  If I turn off power, the processor won't recognize the CAN until I boot through JTAG.  Every thing else in the code seems to work ok.

    This may be caused by one of your functions not being mapped into flash properly and thus only works when RAM is loaded (i.e. JTAG).  Just a possibility.  Are you able to post a copy of your .map file?

    Tim

     

  • Hi Tim,

    To my knowledge, I'm running from flash even when I boot from the JTAG.  Anyway, here is my .map file.

     1321.VGC.pdf

  • From your map file it seems what you say is true, that you are running the majority of your code from flash.  However, the sections ramfuncs and .cinit seem to reside in RAM.  These are sporadically used functions but may make a difference.  Am I able to see your linker file?

    Tim

  • Thanks Tim.  Here it is.  I'm just using the F2801.cmd from the kit.  I haven't changed anything.

    8284.F2801DOTcmd.pdf

     

  • Rick,

    In the linker command file there are sections that have a load address into flash and a run address in RAM.

     

    ramfuncs : LOAD = FLASHD,
                        RUN = RAML0,
                        LOAD_START(_RamfuncsLoadStart),
                        LOAD_END(_RamfuncsLoadEnd),
                        RUN_START(_RamfuncsRunStart),

    Have you copied the functions from their load address into their run address?  In our examples this is done with a memcopy routine just inside of main().  Make sure this is first - if you setup the PLL or ADC  before doing this you can find yourself in one of these functions that has not been copied.

    -Lori

  • Hi Lori,

    I used the sample flash program and SPRA958 for guidance.  I could have still done it wrong.  Here is the beginning of my code where I set everything up.

    8371.Program Start.pdf 

    Thanks

  • At this point I don't have any answers, but I am scratching my head over a few observations:

    If you would, add the -w linker option if it is not already in your project settings.  This will report if any sections are being allocated without the linker command file indicating where they should be allocated.

    The .map file indicates that the .stack failed to allocate:

    .stack 1 00000000 00000400 FAILED TO ALLOCATE

     

    In the .map file, the ramfuncs section shows two object files and is allocated at address 2

    ramfuncs 0 00000002 00000021
               00000002 0000001d DSP280x_SysCtrl.obj (ramfuncs)
               0000001f 00000004 DSP280x_usDelay.obj (ramfuncs)

    But the source code shows thqat the following are also in ramfuncs - so I expected to see more object files allocated to this section

    #pragma CODE_SECTION(ecap2_isr, "ramfuncs");
    #pragma CODE_SECTION(cpu_timer0_isr, "ramfuncs");
    #pragma CODE_SECTION(InitAdc, "ramfuncs");

    The linker file shows that ramfuncs should be running from L0 (0x8000)  but the .map file shows it running from address 0x0002?

    ramfuncs : LOAD = FLASHD,
               RUN = RAML0,
               LOAD_START(_RamfuncsLoadStart),
               LOAD_END(_RamfuncsLoadEnd),
               RUN_START(_RamfuncsRunStart),

     

    I see the memcopy in your code.  It is before the Flash init and the ADC init so that is good.  You can try moving it up right before main, just to see. 

    Remind me - if you load only the symbols and step through the code does it go off into the weeds? 

    -Lori

  • Wow, do you think it's patentable?  ;^) 

    I think part of my problem is I started this project with one of the examples and pieced it together with many other examples.  I left the .h files alone but I tried in vain to rename the project to VGC.  I still see remnants of all the files I used to create this in the linker file.  I could never set up a project on my own as there was no explanation on how to set up the options in the instructions so I had to use an existing project to build my code.

    "Remind me - if you load only the symbols and step through the code does it go off into the weeds?"

    I have tried this several times.  My program is basically one big loop where I input/output some stuff on GPIO.  I also look for CAN input at the beginning of the loop.  No CAN input, I just move on.  If I have CAN input, I operate on the data.  When I step through the code it goes around the loop like normal but just doesn't see the CAN.  Of course, without the CAN input, a lot of my code doesn't get operated on.  The inconsistency between the .map, linker, and code concerns me.  If you notice, I'm running a 2801 and the .map file shows I'm including ECANB, EPWM4-6, and other options that don't exist on the 2801.  Apparently the switches in the .h files aren't excluding these.

    As you can see, the -w option is already set.

  • Here are some screenshots of my linker configuration.  As can be seen from my linker file above, I'm including parts of the "ecap_capture_pwm" project that I started with.  These screen shots show where some of this is coming from.  I don't know how to change this.  My project name is VGC.

    I don't mind troubleshooting this issue but I don't really know where to start.  First, I'm a hardware guy.  Second, as all this is automated under CCS, I haven't got a clue what is going on or what is even supposed to be going on.  I really need some help and direction.

     

    Thanks,

    Rick

  • Hi Lori,

    I tried building to 'Release' rather than 'Debug' to see if it made any difference.  I don't see any difference in the operation.  I also moved MemCopy to the beginning of main.  Still everything works fine when I boot from JTAG but cycle power and my CAN is ignored.

    Here are the map and linker files.

    ******************************************************************************
                 TMS320C2000 Linker PC v5.2.10                     
    ******************************************************************************
    >> Linked Tue May 31 11:25:32 2011
    
    OUTPUT FILE NAME:   <VGC.out>
    ENTRY POINT SYMBOL: "_c_int00"  address: 003f787a
    
    
    MEMORY CONFIGURATION
    
             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
    PAGE 0:
      RAML0                 00008000   00001000  000000d8  00000f28  RWIX
      OTP                   003d7800   00000400  00000000  00000400  RWIX
      FLASHD                003f4000   00001000  000000d8  00000f28  RWIX
      FLASHC                003f5000   00001000  00000000  00001000  RWIX
      FLASHA                003f7000   00000f80  00000afb  00000485  RWIX
      CSM_RSVD              003f7f80   00000076  00000000  00000076  RWIX
      BEGIN                 003f7ff6   00000002  00000002  00000000  RWIX
      CSM_PWL               003f7ff8   00000008  00000000  00000008  RWIX
      ROM                   003ff000   00000fc0  00000000  00000fc0  RWIX
      RESET                 003fffc0   00000002  00000000  00000002  RWIX
      VECTORS               003fffc2   0000003e  00000000  0000003e  RWIX
    
    PAGE 1:
      RAMM0                 00000000   00000400  00000400  00000000  RWIX
      BOOT_RSVD             00000400   00000080  00000000  00000080  RWIX
      RAMM1                 00000480   00000380  00000058  00000328  RWIX
      DEV_EMU               00000880   00000180  000000d0  000000b0  RWIX
      FLASH_REGS            00000a80   00000060  00000008  00000058  RWIX
      CSM                   00000ae0   00000010  00000010  00000000  RWIX
      ADC_MIRROR            00000b00   00000010  00000010  00000000  RWIX
      CPU_TIMER0            00000c00   00000008  00000008  00000000  RWIX
      CPU_TIMER1            00000c08   00000008  00000008  00000000  RWIX
      CPU_TIMER2            00000c10   00000008  00000008  00000000  RWIX
      PIE_CTRL              00000ce0   00000020  0000001a  00000006  RWIX
      PIE_VECT              00000d00   00000100  00000100  00000000  RWIX
      ECANA                 00006000   00000040  00000034  0000000c  RWIX
      ECANA_LAM             00006040   00000040  00000040  00000000  RWIX
      ECANA_MOTS            00006080   00000040  00000040  00000000  RWIX
      ECANA_MOTO            000060c0   00000040  00000040  00000000  RWIX
      ECANA_MBOX            00006100   00000100  00000100  00000000  RWIX
      ECANB                 00006200   00000040  00000034  0000000c  RWIX
      ECANB_LAM             00006240   00000040  00000040  00000000  RWIX
      ECANB_MOTS            00006280   00000040  00000040  00000000  RWIX
      ECANB_MOTO            000062c0   00000040  00000040  00000000  RWIX
      ECANB_MBOX            00006300   00000100  00000100  00000000  RWIX
      EPWM1                 00006800   00000022  00000022  00000000  RWIX
      EPWM2                 00006840   00000022  00000022  00000000  RWIX
      EPWM3                 00006880   00000022  00000022  00000000  RWIX
      EPWM4                 000068c0   00000022  00000022  00000000  RWIX
      EPWM5                 00006900   00000022  00000022  00000000  RWIX
      EPWM6                 00006940   00000022  00000022  00000000  RWIX
      ECAP1                 00006a00   00000020  00000020  00000000  RWIX
      ECAP2                 00006a20   00000020  00000020  00000000  RWIX
      ECAP3                 00006a40   00000020  00000020  00000000  RWIX
      ECAP4                 00006a60   00000020  00000020  00000000  RWIX
      EQEP1                 00006b00   00000040  00000040  00000000  RWIX
      EQEP2                 00006b40   00000040  00000040  00000000  RWIX
      GPIOCTRL              00006f80   00000040  00000040  00000000  RWIX
      GPIODAT               00006fc0   00000020  00000020  00000000  RWIX
      GPIOINT               00006fe0   00000020  0000000a  00000016  RWIX
      SYSTEM                00007010   00000020  00000020  00000000  RWIX
      SPIA                  00007040   00000010  00000010  00000000  RWIX
      SCIA                  00007050   00000010  00000010  00000000  RWIX
      XINTRUPT              00007070   00000010  00000010  00000000  RWIX
      ADC                   00007100   00000020  0000001e  00000002  RWIX
      SPIB                  00007740   00000010  00000010  00000000  RWIX
      SCIB                  00007750   00000010  00000010  00000000  RWIX
      SPIC                  00007760   00000010  00000010  00000000  RWIX
      SPID                  00007780   00000010  00000010  00000000  RWIX
      I2CA                  00007900   00000040  00000022  0000001e  RWIX
      FLASHB                003f6000   00001000  00000000  00001000  RWIX
      CSM_PWL               003f7ff8   00000008  00000008  00000000  RWIX
    
    
    SECTION ALLOCATION MAP
    
     output                                  attributes/
    section   page    origin      length       input sections
    --------  ----  ----------  ----------   ----------------
    .pinit     0    003f7000    00000000     UNINITIALIZED
    
    ramfuncs   0    003f4000    000000d8     RUN ADDR = 00008000
                      003f4000    000000b7     VGC.obj (ramfuncs)
                      003f40b7    0000001d     DSP280x_SysCtrl.obj (ramfuncs)
                      003f40d4    00000004     DSP280x_usDelay.obj (ramfuncs)
    
    .text      0    003f7000    000009ad     
                      003f7000    000003b8     VGC.obj (.text)
                      003f73b8    00000145     DSP280x_DefaultIsr.obj (.text)
                      003f74fd    00000100     DSP280x_SysCtrl.obj (.text)
                      003f75fd    000000ac     DSP280x_ECap.obj (.text)
                      003f76a9    000000a4     DSP280x_EPwm.obj (.text)
                      003f774d    0000007b     DSP280x_ECan.obj (.text)
                      003f77c8    0000005a     rts2800_ml.lib : fs_mpy.obj (.text)
                      003f7822    00000058     DSP280x_CpuTimers.obj (.text)
                      003f787a    00000044     rts2800_ml.lib : boot.obj (.text)
                      003f78be    00000029                    : fs_tol.obj (.text)
                      003f78e7    00000028     DSP280x_PieCtrl.obj (.text)
                      003f790f    00000021     rts2800_ml.lib : memcpy_ff.obj (.text)
                      003f7930    0000001f     DSP280x_PieVect.obj (.text)
                      003f794f    0000001b     rts2800_ml.lib : args_main.obj (.text)
                      003f796a    00000019                    : exit.obj (.text)
                      003f7983    0000000f     DSP280x_MemCopy.obj (.text)
                      003f7992    0000000a     DSP280x_Adc.obj (.text)
                      003f799c    00000009     rts2800_ml.lib : _lock.obj (.text)
                      003f79a5    00000008     DSP280x_CodeStartBranch.obj (.text)
    
    .econst    0    003f79ae    00000100     
                      003f79ae    00000100     DSP280x_PieVect.obj (.econst)
    
    .cinit     0    003f7aae    0000004e     
                      003f7aae    00000038     VGC.obj (.cinit)
                      003f7ae6    0000000a     rts2800_ml.lib : _lock.obj (.cinit)
                      003f7af0    0000000a                    : exit.obj (.cinit)
                      003f7afa    00000002     --HOLE-- [fill = 0]
    
    codestart 
    *          0    003f7ff6    00000002     
                      003f7ff6    00000002     DSP280x_CodeStartBranch.obj (codestart)
    
    .reset     0    003fffc0    00000002     DSECT
                      003fffc0    00000002     rts2800_ml.lib : boot.obj (.reset)
    
    vectors    0    003fffc2    00000000     DSECT
    
    .stack     1    00000000    00000400     UNINITIALIZED
                      00000000    00000400     --HOLE--
    
    .ebss      1    00000480    00000058     UNINITIALIZED
                      00000480    0000002a     VGC.obj (.ebss)
                      000004aa    00000004     rts2800_ml.lib : _lock.obj (.ebss)
                      000004ae    00000004                    : exit.obj (.ebss)
                      000004b2    0000000e     --HOLE--
                      000004c0    00000018     DSP280x_CpuTimers.obj (.ebss)
    
    DevEmuRegsFile 
    *          1    00000880    000000d0     UNINITIALIZED
                      00000880    000000d0     DSP280x_GlobalVariableDefs.obj (DevEmuRegsFile)
    
    FlashRegsFile 
    *          1    00000a80    00000008     UNINITIALIZED
                      00000a80    00000008     DSP280x_GlobalVariableDefs.obj (FlashRegsFile)
    
    CsmRegsFile 
    *          1    00000ae0    00000010     UNINITIALIZED
                      00000ae0    00000010     DSP280x_GlobalVariableDefs.obj (CsmRegsFile)
    
    AdcMirrorFile 
    *          1    00000b00    00000010     UNINITIALIZED
                      00000b00    00000010     DSP280x_GlobalVariableDefs.obj (AdcMirrorFile)
    
    CpuTimer0RegsFile 
    *          1    00000c00    00000008     UNINITIALIZED
                      00000c00    00000008     DSP280x_GlobalVariableDefs.obj (CpuTimer0RegsFile)
    
    CpuTimer1RegsFile 
    *          1    00000c08    00000008     UNINITIALIZED
                      00000c08    00000008     DSP280x_GlobalVariableDefs.obj (CpuTimer1RegsFile)
    
    CpuTimer2RegsFile 
    *          1    00000c10    00000008     UNINITIALIZED
                      00000c10    00000008     DSP280x_GlobalVariableDefs.obj (CpuTimer2RegsFile)
    
    PieCtrlRegsFile 
    *          1    00000ce0    0000001a     UNINITIALIZED
                      00000ce0    0000001a     DSP280x_GlobalVariableDefs.obj (PieCtrlRegsFile)
    
    PieVectTableFile 
    *          1    00000d00    00000100     UNINITIALIZED
                      00000d00    00000100     DSP280x_GlobalVariableDefs.obj (PieVectTableFile)
    
    ECanaRegsFile 
    *          1    00006000    00000034     UNINITIALIZED
                      00006000    00000034     DSP280x_GlobalVariableDefs.obj (ECanaRegsFile)
    
    ECanaLAMRegsFile 
    *          1    00006040    00000040     UNINITIALIZED
                      00006040    00000040     DSP280x_GlobalVariableDefs.obj (ECanaLAMRegsFile)
    
    ECanaMOTSRegsFile 
    *          1    00006080    00000040     UNINITIALIZED
                      00006080    00000040     DSP280x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)
    
    ECanaMOTORegsFile 
    *          1    000060c0    00000040     UNINITIALIZED
                      000060c0    00000040     DSP280x_GlobalVariableDefs.obj (ECanaMOTORegsFile)
    
    ECanaMboxesFile 
    *          1    00006100    00000100     UNINITIALIZED
                      00006100    00000100     DSP280x_GlobalVariableDefs.obj (ECanaMboxesFile)
    
    ECanbRegsFile 
    *          1    00006200    00000034     UNINITIALIZED
                      00006200    00000034     DSP280x_GlobalVariableDefs.obj (ECanbRegsFile)
    
    ECanbLAMRegsFile 
    *          1    00006240    00000040     UNINITIALIZED
                      00006240    00000040     DSP280x_GlobalVariableDefs.obj (ECanbLAMRegsFile)
    
    ECanbMOTSRegsFile 
    *          1    00006280    00000040     UNINITIALIZED
                      00006280    00000040     DSP280x_GlobalVariableDefs.obj (ECanbMOTSRegsFile)
    
    ECanbMOTORegsFile 
    *          1    000062c0    00000040     UNINITIALIZED
                      000062c0    00000040     DSP280x_GlobalVariableDefs.obj (ECanbMOTORegsFile)
    
    ECanbMboxesFile 
    *          1    00006300    00000100     UNINITIALIZED
                      00006300    00000100     DSP280x_GlobalVariableDefs.obj (ECanbMboxesFile)
    
    EPwm1RegsFile 
    *          1    00006800    00000022     UNINITIALIZED
                      00006800    00000022     DSP280x_GlobalVariableDefs.obj (EPwm1RegsFile)
    
    EPwm2RegsFile 
    *          1    00006840    00000022     UNINITIALIZED
                      00006840    00000022     DSP280x_GlobalVariableDefs.obj (EPwm2RegsFile)
    
    EPwm3RegsFile 
    *          1    00006880    00000022     UNINITIALIZED
                      00006880    00000022     DSP280x_GlobalVariableDefs.obj (EPwm3RegsFile)
    
    EPwm4RegsFile 
    *          1    000068c0    00000022     UNINITIALIZED
                      000068c0    00000022     DSP280x_GlobalVariableDefs.obj (EPwm4RegsFile)
    
    EPwm5RegsFile 
    *          1    00006900    00000022     UNINITIALIZED
                      00006900    00000022     DSP280x_GlobalVariableDefs.obj (EPwm5RegsFile)
    
    EPwm6RegsFile 
    *          1    00006940    00000022     UNINITIALIZED
                      00006940    00000022     DSP280x_GlobalVariableDefs.obj (EPwm6RegsFile)
    
    ECap1RegsFile 
    *          1    00006a00    00000020     UNINITIALIZED
                      00006a00    00000020     DSP280x_GlobalVariableDefs.obj (ECap1RegsFile)
    
    ECap2RegsFile 
    *          1    00006a20    00000020     UNINITIALIZED
                      00006a20    00000020     DSP280x_GlobalVariableDefs.obj (ECap2RegsFile)
    
    ECap3RegsFile 
    *          1    00006a40    00000020     UNINITIALIZED
                      00006a40    00000020     DSP280x_GlobalVariableDefs.obj (ECap3RegsFile)
    
    ECap4RegsFile 
    *          1    00006a60    00000020     UNINITIALIZED
                      00006a60    00000020     DSP280x_GlobalVariableDefs.obj (ECap4RegsFile)
    
    EQep1RegsFile 
    *          1    00006b00    00000040     UNINITIALIZED
                      00006b00    00000040     DSP280x_GlobalVariableDefs.obj (EQep1RegsFile)
    
    EQep2RegsFile 
    *          1    00006b40    00000040     UNINITIALIZED
                      00006b40    00000040     DSP280x_GlobalVariableDefs.obj (EQep2RegsFile)
    
    GpioCtrlRegsFile 
    *          1    00006f80    00000040     UNINITIALIZED
                      00006f80    00000040     DSP280x_GlobalVariableDefs.obj (GpioCtrlRegsFile)
    
    GpioDataRegsFile 
    *          1    00006fc0    00000020     UNINITIALIZED
                      00006fc0    00000020     DSP280x_GlobalVariableDefs.obj (GpioDataRegsFile)
    
    GpioIntRegsFile 
    *          1    00006fe0    0000000a     UNINITIALIZED
                      00006fe0    0000000a     DSP280x_GlobalVariableDefs.obj (GpioIntRegsFile)
    
    SysCtrlRegsFile 
    *          1    00007010    00000020     UNINITIALIZED
                      00007010    00000020     DSP280x_GlobalVariableDefs.obj (SysCtrlRegsFile)
    
    SpiaRegsFile 
    *          1    00007040    00000010     UNINITIALIZED
                      00007040    00000010     DSP280x_GlobalVariableDefs.obj (SpiaRegsFile)
    
    SciaRegsFile 
    *          1    00007050    00000010     UNINITIALIZED
                      00007050    00000010     DSP280x_GlobalVariableDefs.obj (SciaRegsFile)
    
    XIntruptRegsFile 
    *          1    00007070    00000010     UNINITIALIZED
                      00007070    00000010     DSP280x_GlobalVariableDefs.obj (XIntruptRegsFile)
    
    AdcRegsFile 
    *          1    00007100    0000001e     UNINITIALIZED
                      00007100    0000001e     DSP280x_GlobalVariableDefs.obj (AdcRegsFile)
    
    SpibRegsFile 
    *          1    00007740    00000010     UNINITIALIZED
                      00007740    00000010     DSP280x_GlobalVariableDefs.obj (SpibRegsFile)
    
    ScibRegsFile 
    *          1    00007750    00000010     UNINITIALIZED
                      00007750    00000010     DSP280x_GlobalVariableDefs.obj (ScibRegsFile)
    
    SpicRegsFile 
    *          1    00007760    00000010     UNINITIALIZED
                      00007760    00000010     DSP280x_GlobalVariableDefs.obj (SpicRegsFile)
    
    SpidRegsFile 
    *          1    00007780    00000010     UNINITIALIZED
                      00007780    00000010     DSP280x_GlobalVariableDefs.obj (SpidRegsFile)
    
    I2caRegsFile 
    *          1    00007900    00000022     UNINITIALIZED
                      00007900    00000022     DSP280x_GlobalVariableDefs.obj (I2caRegsFile)
    
    CsmPwlFile 
    *          1    003f7ff8    00000008     UNINITIALIZED
                      003f7ff8    00000008     DSP280x_GlobalVariableDefs.obj (CsmPwlFile)
    
    
    GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 
    
    address    name
    --------   ----
    003f7000   .text
    003f796a   C$$EXIT
    003f77c8   FS$$MPY
    003f78be   FS$$TOL
    003f74f8   _ADCINT_ISR
    00000b00   _AdcMirror
    00007100   _AdcRegs
    000004a4   _BitData
    00000485   _CANTestFlag
    00000486   _CRC
    000004a0   _CmdMsg
    0000049c   _CmdRspMsg
    003f7855   _ConfigCpuTimer
    00000498   _Counters
    000004d0   _CpuTimer0
    00000c00   _CpuTimer0Regs
    000004c0   _CpuTimer1
    00000c08   _CpuTimer1Regs
    000004c8   _CpuTimer2
    00000c10   _CpuTimer2Regs
    003f7ff8   _CsmPwl
    00000ae0   _CsmRegs
    003f75cf   _CsmUnlock
    003f74f3   _DATALOG_ISR
    000080d4   _DSP28x_usDelay
    00000880   _DevEmuRegs
    003f7507   _DisableDog
    003f74ee   _ECAN0INTA_ISR
    003f74e9   _ECAN0INTB_ISR
    003f74e4   _ECAN1INTA_ISR
    003f74df   _ECAN1INTB_ISR
    003f74da   _ECAP1_INT_ISR
    003f74d5   _ECAP2_INT_ISR
    003f74d0   _ECAP3_INT_ISR
    003f74cb   _ECAP4_INT_ISR
    00006040   _ECanaLAMRegs
    000060c0   _ECanaMOTORegs
    00006080   _ECanaMOTSRegs
    00006100   _ECanaMboxes
    00006000   _ECanaRegs
    00006240   _ECanbLAMRegs
    000062c0   _ECanbMOTORegs
    00006280   _ECanbMOTSRegs
    00006300   _ECanbMboxes
    00006200   _ECanbRegs
    00006a00   _ECap1Regs
    00006a20   _ECap2Regs
    00006a40   _ECap3Regs
    00006a60   _ECap4Regs
    003f74c6   _EMPTY_ISR
    003f74c1   _EMUINT_ISR
    003f74bc   _EPWM1_INT_ISR
    003f74b7   _EPWM1_TZINT_ISR
    003f74b2   _EPWM2_INT_ISR
    003f74ad   _EPWM2_TZINT_ISR
    003f74a8   _EPWM3_INT_ISR
    003f74a3   _EPWM3_TZINT_ISR
    003f749e   _EPWM4_INT_ISR
    003f7499   _EPWM4_TZINT_ISR
    003f7494   _EPWM5_INT_ISR
    003f748f   _EPWM5_TZINT_ISR
    003f748a   _EPWM6_INT_ISR
    003f7485   _EPWM6_TZINT_ISR
    00006800   _EPwm1Regs
    00006840   _EPwm2Regs
    00006880   _EPwm3Regs
    000068c0   _EPwm4Regs
    00006900   _EPwm5Regs
    00006940   _EPwm6Regs
    003f7480   _EQEP1_INT_ISR
    003f747b   _EQEP2_INT_ISR
    00006b00   _EQep1Regs
    00006b40   _EQep2Regs
    003f7906   _EnableInterrupts
    003f73b5   _Fail
    00000481   _Flag
    00000a80   _FlashRegs
    003f7078   _GetADC
    00000482   _GotCan
    00000483   _GotWindOpen
    00006f80   _GpioCtrlRegs
    00006fc0   _GpioDataRegs
    00006fe0   _GpioIntRegs
    003f7476   _I2CINT1A_ISR
    003f7471   _I2CINT2A_ISR
    00007900   _I2caRegs
    003f746c   _ILLEGAL_ISR
    003f7467   _INT13_ISR
    003f7462   _INT14_ISR
    003f7992   _InitAdc
    003f7822   _InitCpuTimers
    003f7768   _InitECana
    003f774d   _InitECanaGpio
    003f769b   _InitECap2Gpio
    003f7668   _InitECapture
    003f774c   _InitEPwm
    003f7701   _InitEPwm1Gpio
    003f7717   _InitEPwm2Gpio
    003f772d   _InitEPwm3Gpio
    003f7745   _InitEPwmGpio
    003f76e6   _InitEPwmSyncGpio
    003f7029   _InitEPwmTimer
    000080b7   _InitFlash
    003f75fd   _InitGenGpio
    003f7000   _InitMessage
    003f7540   _InitPeripheralClocks
    003f78e7   _InitPieCtrl
    003f7930   _InitPieVectTable
    003f750f   _InitPll
    003f75c6   _InitSysCtrl
    003f76a9   _InitTzGpio
    003f70e4   _InitiatedBit
    00000480   _IntFlt
    003f7983   _MemCopy
    003f745d   _NMI_ISR
    003f7458   _PIE_RESERVED
    00000ce0   _PieCtrlRegs
    00000d00   _PieVectTable
    003f79ae   _PieVectTableInit
    003f7453   _RTOSINT_ISR
    003f40d8   _RamfuncsLoadEnd
    003f4000   _RamfuncsLoadStart
    00008000   _RamfuncsRunStart
    003f7106   _ReceiveCANMsg
    003f744e   _SCIRXINTA_ISR
    003f7449   _SCIRXINTB_ISR
    003f7444   _SCITXINTA_ISR
    003f743f   _SCITXINTB_ISR
    003f743a   _SEQ1INT_ISR
    003f7435   _SEQ2INT_ISR
    003f7430   _SPIRXINTA_ISR
    003f742b   _SPIRXINTB_ISR
    003f7426   _SPIRXINTC_ISR
    003f7421   _SPIRXINTD_ISR
    003f741c   _SPITXINTA_ISR
    003f7417   _SPITXINTB_ISR
    003f7412   _SPITXINTC_ISR
    003f740d   _SPITXINTD_ISR
    00007050   _SciaRegs
    00007750   _ScibRegs
    003f7111   _SendCANMsg
    003f717a   _SendCANTest
    003f74fd   _ServiceDog
    00000488   _SpdPeriod
    00007040   _SpiaRegs
    00007740   _SpibRegs
    00007760   _SpicRegs
    00007780   _SpidRegs
    003f70fb   _Stop
    00007010   _SysCtrlRegs
    003f7408   _TINT0_ISR
    003f70bb   _TempCheck
    00000494   _TempFlash1
    00000496   _TempFlash2
    00000490   _TempFlash3
    00000492   _TempFlash4
    0000048a   _TempFlash5
    0000048c   _TempFlash6
    003f7403   _USER10_ISR
    003f73fe   _USER11_ISR
    003f73f9   _USER12_ISR
    003f73f4   _USER1_ISR
    003f73ef   _USER2_ISR
    003f73ea   _USER3_ISR
    003f73e5   _USER4_ISR
    003f73e0   _USER5_ISR
    003f73db   _USER6_ISR
    003f73d6   _USER7_ISR
    003f73d1   _USER8_ISR
    003f73cc   _USER9_ISR
    003f73c7   _WAKEINT_ISR
    00000484   _WDCheck
    0000048e   _WDCounter
    003f73c2   _XINT1_ISR
    003f73bd   _XINT2_ISR
    00007070   _XIntruptRegs
    00000400   __STACK_END
    00000400   __STACK_SIZE
    00000001   __TI_args_main
    ffffffff   ___binit__
    ffffffff   ___c_args__
    003f7aae   ___cinit__
    003f79ad   ___etext__
    003f790f   ___memcpy_ff
    ffffffff   ___pinit__
    003f7000   ___text__
    003f794f   __args_main
    000004ae   __cleanup_ptr
    000004b0   __dtors_ptr
    000004ac   __lock
    003f79a4   __nop
    003f79a0   __register_lock
    003f799c   __register_unlock
    00000000   __stack
    000004aa   __unlock
    003f796a   _abort
    003f787a   _c_int00
    00008028   _cpu_timer0_isr
    003f7052   _crc16
    00008000   _ecap2_isr
    003f796c   _exit
    003f71b3   _main
    003f73b8   _rsvd_ISR
    ffffffff   binit
    003f7aae   cinit
    003f7ff6   code_start
    003f79ad   etext
    ffffffff   pinit
    
    
    GLOBAL SYMBOLS: SORTED BY Symbol Address 
    
    address    name
    --------   ----
    00000000   __stack
    00000001   __TI_args_main
    00000400   __STACK_END
    00000400   __STACK_SIZE
    00000480   _IntFlt
    00000481   _Flag
    00000482   _GotCan
    00000483   _GotWindOpen
    00000484   _WDCheck
    00000485   _CANTestFlag
    00000486   _CRC
    00000488   _SpdPeriod
    0000048a   _TempFlash5
    0000048c   _TempFlash6
    0000048e   _WDCounter
    00000490   _TempFlash3
    00000492   _TempFlash4
    00000494   _TempFlash1
    00000496   _TempFlash2
    00000498   _Counters
    0000049c   _CmdRspMsg
    000004a0   _CmdMsg
    000004a4   _BitData
    000004aa   __unlock
    000004ac   __lock
    000004ae   __cleanup_ptr
    000004b0   __dtors_ptr
    000004c0   _CpuTimer1
    000004c8   _CpuTimer2
    000004d0   _CpuTimer0
    00000880   _DevEmuRegs
    00000a80   _FlashRegs
    00000ae0   _CsmRegs
    00000b00   _AdcMirror
    00000c00   _CpuTimer0Regs
    00000c08   _CpuTimer1Regs
    00000c10   _CpuTimer2Regs
    00000ce0   _PieCtrlRegs
    00000d00   _PieVectTable
    00006000   _ECanaRegs
    00006040   _ECanaLAMRegs
    00006080   _ECanaMOTSRegs
    000060c0   _ECanaMOTORegs
    00006100   _ECanaMboxes
    00006200   _ECanbRegs
    00006240   _ECanbLAMRegs
    00006280   _ECanbMOTSRegs
    000062c0   _ECanbMOTORegs
    00006300   _ECanbMboxes
    00006800   _EPwm1Regs
    00006840   _EPwm2Regs
    00006880   _EPwm3Regs
    000068c0   _EPwm4Regs
    00006900   _EPwm5Regs
    00006940   _EPwm6Regs
    00006a00   _ECap1Regs
    00006a20   _ECap2Regs
    00006a40   _ECap3Regs
    00006a60   _ECap4Regs
    00006b00   _EQep1Regs
    00006b40   _EQep2Regs
    00006f80   _GpioCtrlRegs
    00006fc0   _GpioDataRegs
    00006fe0   _GpioIntRegs
    00007010   _SysCtrlRegs
    00007040   _SpiaRegs
    00007050   _SciaRegs
    00007070   _XIntruptRegs
    00007100   _AdcRegs
    00007740   _SpibRegs
    00007750   _ScibRegs
    00007760   _SpicRegs
    00007780   _SpidRegs
    00007900   _I2caRegs
    00008000   _RamfuncsRunStart
    00008000   _ecap2_isr
    00008028   _cpu_timer0_isr
    000080b7   _InitFlash
    000080d4   _DSP28x_usDelay
    003f4000   _RamfuncsLoadStart
    003f40d8   _RamfuncsLoadEnd
    003f7000   .text
    003f7000   _InitMessage
    003f7000   ___text__
    003f7029   _InitEPwmTimer
    003f7052   _crc16
    003f7078   _GetADC
    003f70bb   _TempCheck
    003f70e4   _InitiatedBit
    003f70fb   _Stop
    003f7106   _ReceiveCANMsg
    003f7111   _SendCANMsg
    003f717a   _SendCANTest
    003f71b3   _main
    003f73b5   _Fail
    003f73b8   _rsvd_ISR
    003f73bd   _XINT2_ISR
    003f73c2   _XINT1_ISR
    003f73c7   _WAKEINT_ISR
    003f73cc   _USER9_ISR
    003f73d1   _USER8_ISR
    003f73d6   _USER7_ISR
    003f73db   _USER6_ISR
    003f73e0   _USER5_ISR
    003f73e5   _USER4_ISR
    003f73ea   _USER3_ISR
    003f73ef   _USER2_ISR
    003f73f4   _USER1_ISR
    003f73f9   _USER12_ISR
    003f73fe   _USER11_ISR
    003f7403   _USER10_ISR
    003f7408   _TINT0_ISR
    003f740d   _SPITXINTD_ISR
    003f7412   _SPITXINTC_ISR
    003f7417   _SPITXINTB_ISR
    003f741c   _SPITXINTA_ISR
    003f7421   _SPIRXINTD_ISR
    003f7426   _SPIRXINTC_ISR
    003f742b   _SPIRXINTB_ISR
    003f7430   _SPIRXINTA_ISR
    003f7435   _SEQ2INT_ISR
    003f743a   _SEQ1INT_ISR
    003f743f   _SCITXINTB_ISR
    003f7444   _SCITXINTA_ISR
    003f7449   _SCIRXINTB_ISR
    003f744e   _SCIRXINTA_ISR
    003f7453   _RTOSINT_ISR
    003f7458   _PIE_RESERVED
    003f745d   _NMI_ISR
    003f7462   _INT14_ISR
    003f7467   _INT13_ISR
    003f746c   _ILLEGAL_ISR
    003f7471   _I2CINT2A_ISR
    003f7476   _I2CINT1A_ISR
    003f747b   _EQEP2_INT_ISR
    003f7480   _EQEP1_INT_ISR
    003f7485   _EPWM6_TZINT_ISR
    003f748a   _EPWM6_INT_ISR
    003f748f   _EPWM5_TZINT_ISR
    003f7494   _EPWM5_INT_ISR
    003f7499   _EPWM4_TZINT_ISR
    003f749e   _EPWM4_INT_ISR
    003f74a3   _EPWM3_TZINT_ISR
    003f74a8   _EPWM3_INT_ISR
    003f74ad   _EPWM2_TZINT_ISR
    003f74b2   _EPWM2_INT_ISR
    003f74b7   _EPWM1_TZINT_ISR
    003f74bc   _EPWM1_INT_ISR
    003f74c1   _EMUINT_ISR
    003f74c6   _EMPTY_ISR
    003f74cb   _ECAP4_INT_ISR
    003f74d0   _ECAP3_INT_ISR
    003f74d5   _ECAP2_INT_ISR
    003f74da   _ECAP1_INT_ISR
    003f74df   _ECAN1INTB_ISR
    003f74e4   _ECAN1INTA_ISR
    003f74e9   _ECAN0INTB_ISR
    003f74ee   _ECAN0INTA_ISR
    003f74f3   _DATALOG_ISR
    003f74f8   _ADCINT_ISR
    003f74fd   _ServiceDog
    003f7507   _DisableDog
    003f750f   _InitPll
    003f7540   _InitPeripheralClocks
    003f75c6   _InitSysCtrl
    003f75cf   _CsmUnlock
    003f75fd   _InitGenGpio
    003f7668   _InitECapture
    003f769b   _InitECap2Gpio
    003f76a9   _InitTzGpio
    003f76e6   _InitEPwmSyncGpio
    003f7701   _InitEPwm1Gpio
    003f7717   _InitEPwm2Gpio
    003f772d   _InitEPwm3Gpio
    003f7745   _InitEPwmGpio
    003f774c   _InitEPwm
    003f774d   _InitECanaGpio
    003f7768   _InitECana
    003f77c8   FS$$MPY
    003f7822   _InitCpuTimers
    003f7855   _ConfigCpuTimer
    003f787a   _c_int00
    003f78be   FS$$TOL
    003f78e7   _InitPieCtrl
    003f7906   _EnableInterrupts
    003f790f   ___memcpy_ff
    003f7930   _InitPieVectTable
    003f794f   __args_main
    003f796a   C$$EXIT
    003f796a   _abort
    003f796c   _exit
    003f7983   _MemCopy
    003f7992   _InitAdc
    003f799c   __register_unlock
    003f79a0   __register_lock
    003f79a4   __nop
    003f79ad   ___etext__
    003f79ad   etext
    003f79ae   _PieVectTableInit
    003f7aae   ___cinit__
    003f7aae   cinit
    003f7ff6   code_start
    003f7ff8   _CsmPwl
    ffffffff   ___binit__
    ffffffff   ___c_args__
    ffffffff   ___pinit__
    ffffffff   binit
    ffffffff   pinit
    
    [208 symbols]
    

    --silicon_version=28 
    -g 
    -O3 
    --define="LARGE_MODEL" 
    --quiet 
    --diag_warning=225 
    --large_memory_model 
    --obj_directory="C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release" 
    -z 
    -m"VGC.map" 
    --warn_sections 
    -i"C:/Program Files/Texas Instruments/ccsv4/tools/compiler/C2000 Code Generation Tools 5.2.10/lib" -i"C:/Program Files/Texas Instruments/ccsv4/tools/compiler/C2000 Code Generation Tools 5.2.10/include" -i"C:/TI/controlSUITE/device_support/f2801/v170/DSP280x_examples_ccsv4/ecap_capture_pwm" 
    --reread_libs 
    --rom_model 
    "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/VGC.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_usDelay.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_SysCtrl.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_PieVect.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_PieCtrl.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_MemCopy.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_GlobalVariableDefs.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_EPwm.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_ECap.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_ECan.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_DefaultIsr.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_CpuTimers.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_CodeStartBranch.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_Adc.obj" -l"libc.a" "C:/TI/controlSUITE/device_support/f2801/v170/DSP280x_headers/cmd/DSP280x_Headers_nonBIOS.cmd" "../F2801.cmd" 

  • Richard Shank said:

    Hi Lori,

    I tried building to 'Release' rather than 'Debug' to see if it made any difference.  I don't see any difference in the operation.  Still my CAN is ignored.

    Here are the map and linker files.

    ******************************************************************************
                 TMS320C2000 Linker PC v5.2.10                     
    ******************************************************************************
    >> Linked Tue May 31 11:25:32 2011
    
    OUTPUT FILE NAME:   <VGC.out>
    ENTRY POINT SYMBOL: "_c_int00"  address: 003f787a
    
    
    MEMORY CONFIGURATION
    
             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
    PAGE 0:
      RAML0                 00008000   00001000  000000d8  00000f28  RWIX
      OTP                   003d7800   00000400  00000000  00000400  RWIX
      FLASHD                003f4000   00001000  000000d8  00000f28  RWIX
      FLASHC                003f5000   00001000  00000000  00001000  RWIX
      FLASHA                003f7000   00000f80  00000afb  00000485  RWIX
      CSM_RSVD              003f7f80   00000076  00000000  00000076  RWIX
      BEGIN                 003f7ff6   00000002  00000002  00000000  RWIX
      CSM_PWL               003f7ff8   00000008  00000000  00000008  RWIX
      ROM                   003ff000   00000fc0  00000000  00000fc0  RWIX
      RESET                 003fffc0   00000002  00000000  00000002  RWIX
      VECTORS               003fffc2   0000003e  00000000  0000003e  RWIX
    
    PAGE 1:
      RAMM0                 00000000   00000400  00000400  00000000  RWIX
      BOOT_RSVD             00000400   00000080  00000000  00000080  RWIX
      RAMM1                 00000480   00000380  00000058  00000328  RWIX
      DEV_EMU               00000880   00000180  000000d0  000000b0  RWIX
      FLASH_REGS            00000a80   00000060  00000008  00000058  RWIX
      CSM                   00000ae0   00000010  00000010  00000000  RWIX
      ADC_MIRROR            00000b00   00000010  00000010  00000000  RWIX
      CPU_TIMER0            00000c00   00000008  00000008  00000000  RWIX
      CPU_TIMER1            00000c08   00000008  00000008  00000000  RWIX
      CPU_TIMER2            00000c10   00000008  00000008  00000000  RWIX
      PIE_CTRL              00000ce0   00000020  0000001a  00000006  RWIX
      PIE_VECT              00000d00   00000100  00000100  00000000  RWIX
      ECANA                 00006000   00000040  00000034  0000000c  RWIX
      ECANA_LAM             00006040   00000040  00000040  00000000  RWIX
      ECANA_MOTS            00006080   00000040  00000040  00000000  RWIX
      ECANA_MOTO            000060c0   00000040  00000040  00000000  RWIX
      ECANA_MBOX            00006100   00000100  00000100  00000000  RWIX
      ECANB                 00006200   00000040  00000034  0000000c  RWIX
      ECANB_LAM             00006240   00000040  00000040  00000000  RWIX
      ECANB_MOTS            00006280   00000040  00000040  00000000  RWIX
      ECANB_MOTO            000062c0   00000040  00000040  00000000  RWIX
      ECANB_MBOX            00006300   00000100  00000100  00000000  RWIX
      EPWM1                 00006800   00000022  00000022  00000000  RWIX
      EPWM2                 00006840   00000022  00000022  00000000  RWIX
      EPWM3                 00006880   00000022  00000022  00000000  RWIX
      EPWM4                 000068c0   00000022  00000022  00000000  RWIX
      EPWM5                 00006900   00000022  00000022  00000000  RWIX
      EPWM6                 00006940   00000022  00000022  00000000  RWIX
      ECAP1                 00006a00   00000020  00000020  00000000  RWIX
      ECAP2                 00006a20   00000020  00000020  00000000  RWIX
      ECAP3                 00006a40   00000020  00000020  00000000  RWIX
      ECAP4                 00006a60   00000020  00000020  00000000  RWIX
      EQEP1                 00006b00   00000040  00000040  00000000  RWIX
      EQEP2                 00006b40   00000040  00000040  00000000  RWIX
      GPIOCTRL              00006f80   00000040  00000040  00000000  RWIX
      GPIODAT               00006fc0   00000020  00000020  00000000  RWIX
      GPIOINT               00006fe0   00000020  0000000a  00000016  RWIX
      SYSTEM                00007010   00000020  00000020  00000000  RWIX
      SPIA                  00007040   00000010  00000010  00000000  RWIX
      SCIA                  00007050   00000010  00000010  00000000  RWIX
      XINTRUPT              00007070   00000010  00000010  00000000  RWIX
      ADC                   00007100   00000020  0000001e  00000002  RWIX
      SPIB                  00007740   00000010  00000010  00000000  RWIX
      SCIB                  00007750   00000010  00000010  00000000  RWIX
      SPIC                  00007760   00000010  00000010  00000000  RWIX
      SPID                  00007780   00000010  00000010  00000000  RWIX
      I2CA                  00007900   00000040  00000022  0000001e  RWIX
      FLASHB                003f6000   00001000  00000000  00001000  RWIX
      CSM_PWL               003f7ff8   00000008  00000008  00000000  RWIX
    
    
    SECTION ALLOCATION MAP
    
     output                                  attributes/
    section   page    origin      length       input sections
    --------  ----  ----------  ----------   ----------------
    .pinit     0    003f7000    00000000     UNINITIALIZED
    
    ramfuncs   0    003f4000    000000d8     RUN ADDR = 00008000
                      003f4000    000000b7     VGC.obj (ramfuncs)
                      003f40b7    0000001d     DSP280x_SysCtrl.obj (ramfuncs)
                      003f40d4    00000004     DSP280x_usDelay.obj (ramfuncs)
    
    .text      0    003f7000    000009ad     
                      003f7000    000003b8     VGC.obj (.text)
                      003f73b8    00000145     DSP280x_DefaultIsr.obj (.text)
                      003f74fd    00000100     DSP280x_SysCtrl.obj (.text)
                      003f75fd    000000ac     DSP280x_ECap.obj (.text)
                      003f76a9    000000a4     DSP280x_EPwm.obj (.text)
                      003f774d    0000007b     DSP280x_ECan.obj (.text)
                      003f77c8    0000005a     rts2800_ml.lib : fs_mpy.obj (.text)
                      003f7822    00000058     DSP280x_CpuTimers.obj (.text)
                      003f787a    00000044     rts2800_ml.lib : boot.obj (.text)
                      003f78be    00000029                    : fs_tol.obj (.text)
                      003f78e7    00000028     DSP280x_PieCtrl.obj (.text)
                      003f790f    00000021     rts2800_ml.lib : memcpy_ff.obj (.text)
                      003f7930    0000001f     DSP280x_PieVect.obj (.text)
                      003f794f    0000001b     rts2800_ml.lib : args_main.obj (.text)
                      003f796a    00000019                    : exit.obj (.text)
                      003f7983    0000000f     DSP280x_MemCopy.obj (.text)
                      003f7992    0000000a     DSP280x_Adc.obj (.text)
                      003f799c    00000009     rts2800_ml.lib : _lock.obj (.text)
                      003f79a5    00000008     DSP280x_CodeStartBranch.obj (.text)
    
    .econst    0    003f79ae    00000100     
                      003f79ae    00000100     DSP280x_PieVect.obj (.econst)
    
    .cinit     0    003f7aae    0000004e     
                      003f7aae    00000038     VGC.obj (.cinit)
                      003f7ae6    0000000a     rts2800_ml.lib : _lock.obj (.cinit)
                      003f7af0    0000000a                    : exit.obj (.cinit)
                      003f7afa    00000002     --HOLE-- [fill = 0]
    
    codestart 
    *          0    003f7ff6    00000002     
                      003f7ff6    00000002     DSP280x_CodeStartBranch.obj (codestart)
    
    .reset     0    003fffc0    00000002     DSECT
                      003fffc0    00000002     rts2800_ml.lib : boot.obj (.reset)
    
    vectors    0    003fffc2    00000000     DSECT
    
    .stack     1    00000000    00000400     UNINITIALIZED
                      00000000    00000400     --HOLE--
    
    .ebss      1    00000480    00000058     UNINITIALIZED
                      00000480    0000002a     VGC.obj (.ebss)
                      000004aa    00000004     rts2800_ml.lib : _lock.obj (.ebss)
                      000004ae    00000004                    : exit.obj (.ebss)
                      000004b2    0000000e     --HOLE--
                      000004c0    00000018     DSP280x_CpuTimers.obj (.ebss)
    
    DevEmuRegsFile 
    *          1    00000880    000000d0     UNINITIALIZED
                      00000880    000000d0     DSP280x_GlobalVariableDefs.obj (DevEmuRegsFile)
    
    FlashRegsFile 
    *          1    00000a80    00000008     UNINITIALIZED
                      00000a80    00000008     DSP280x_GlobalVariableDefs.obj (FlashRegsFile)
    
    CsmRegsFile 
    *          1    00000ae0    00000010     UNINITIALIZED
                      00000ae0    00000010     DSP280x_GlobalVariableDefs.obj (CsmRegsFile)
    
    AdcMirrorFile 
    *          1    00000b00    00000010     UNINITIALIZED
                      00000b00    00000010     DSP280x_GlobalVariableDefs.obj (AdcMirrorFile)
    
    CpuTimer0RegsFile 
    *          1    00000c00    00000008     UNINITIALIZED
                      00000c00    00000008     DSP280x_GlobalVariableDefs.obj (CpuTimer0RegsFile)
    
    CpuTimer1RegsFile 
    *          1    00000c08    00000008     UNINITIALIZED
                      00000c08    00000008     DSP280x_GlobalVariableDefs.obj (CpuTimer1RegsFile)
    
    CpuTimer2RegsFile 
    *          1    00000c10    00000008     UNINITIALIZED
                      00000c10    00000008     DSP280x_GlobalVariableDefs.obj (CpuTimer2RegsFile)
    
    PieCtrlRegsFile 
    *          1    00000ce0    0000001a     UNINITIALIZED
                      00000ce0    0000001a     DSP280x_GlobalVariableDefs.obj (PieCtrlRegsFile)
    
    PieVectTableFile 
    *          1    00000d00    00000100     UNINITIALIZED
                      00000d00    00000100     DSP280x_GlobalVariableDefs.obj (PieVectTableFile)
    
    ECanaRegsFile 
    *          1    00006000    00000034     UNINITIALIZED
                      00006000    00000034     DSP280x_GlobalVariableDefs.obj (ECanaRegsFile)
    
    ECanaLAMRegsFile 
    *          1    00006040    00000040     UNINITIALIZED
                      00006040    00000040     DSP280x_GlobalVariableDefs.obj (ECanaLAMRegsFile)
    
    ECanaMOTSRegsFile 
    *          1    00006080    00000040     UNINITIALIZED
                      00006080    00000040     DSP280x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)
    
    ECanaMOTORegsFile 
    *          1    000060c0    00000040     UNINITIALIZED
                      000060c0    00000040     DSP280x_GlobalVariableDefs.obj (ECanaMOTORegsFile)
    
    ECanaMboxesFile 
    *          1    00006100    00000100     UNINITIALIZED
                      00006100    00000100     DSP280x_GlobalVariableDefs.obj (ECanaMboxesFile)
    
    ECanbRegsFile 
    *          1    00006200    00000034     UNINITIALIZED
                      00006200    00000034     DSP280x_GlobalVariableDefs.obj (ECanbRegsFile)
    
    ECanbLAMRegsFile 
    *          1    00006240    00000040     UNINITIALIZED
                      00006240    00000040     DSP280x_GlobalVariableDefs.obj (ECanbLAMRegsFile)
    
    ECanbMOTSRegsFile 
    *          1    00006280    00000040     UNINITIALIZED
                      00006280    00000040     DSP280x_GlobalVariableDefs.obj (ECanbMOTSRegsFile)
    
    ECanbMOTORegsFile 
    *          1    000062c0    00000040     UNINITIALIZED
                      000062c0    00000040     DSP280x_GlobalVariableDefs.obj (ECanbMOTORegsFile)
    
    ECanbMboxesFile 
    *          1    00006300    00000100     UNINITIALIZED
                      00006300    00000100     DSP280x_GlobalVariableDefs.obj (ECanbMboxesFile)
    
    EPwm1RegsFile 
    *          1    00006800    00000022     UNINITIALIZED
                      00006800    00000022     DSP280x_GlobalVariableDefs.obj (EPwm1RegsFile)
    
    EPwm2RegsFile 
    *          1    00006840    00000022     UNINITIALIZED
                      00006840    00000022     DSP280x_GlobalVariableDefs.obj (EPwm2RegsFile)
    
    EPwm3RegsFile 
    *          1    00006880    00000022     UNINITIALIZED
                      00006880    00000022     DSP280x_GlobalVariableDefs.obj (EPwm3RegsFile)
    
    EPwm4RegsFile 
    *          1    000068c0    00000022     UNINITIALIZED
                      000068c0    00000022     DSP280x_GlobalVariableDefs.obj (EPwm4RegsFile)
    
    EPwm5RegsFile 
    *          1    00006900    00000022     UNINITIALIZED
                      00006900    00000022     DSP280x_GlobalVariableDefs.obj (EPwm5RegsFile)
    
    EPwm6RegsFile 
    *          1    00006940    00000022     UNINITIALIZED
                      00006940    00000022     DSP280x_GlobalVariableDefs.obj (EPwm6RegsFile)
    
    ECap1RegsFile 
    *          1    00006a00    00000020     UNINITIALIZED
                      00006a00    00000020     DSP280x_GlobalVariableDefs.obj (ECap1RegsFile)
    
    ECap2RegsFile 
    *          1    00006a20    00000020     UNINITIALIZED
                      00006a20    00000020     DSP280x_GlobalVariableDefs.obj (ECap2RegsFile)
    
    ECap3RegsFile 
    *          1    00006a40    00000020     UNINITIALIZED
                      00006a40    00000020     DSP280x_GlobalVariableDefs.obj (ECap3RegsFile)
    
    ECap4RegsFile 
    *          1    00006a60    00000020     UNINITIALIZED
                      00006a60    00000020     DSP280x_GlobalVariableDefs.obj (ECap4RegsFile)
    
    EQep1RegsFile 
    *          1    00006b00    00000040     UNINITIALIZED
                      00006b00    00000040     DSP280x_GlobalVariableDefs.obj (EQep1RegsFile)
    
    EQep2RegsFile 
    *          1    00006b40    00000040     UNINITIALIZED
                      00006b40    00000040     DSP280x_GlobalVariableDefs.obj (EQep2RegsFile)
    
    GpioCtrlRegsFile 
    *          1    00006f80    00000040     UNINITIALIZED
                      00006f80    00000040     DSP280x_GlobalVariableDefs.obj (GpioCtrlRegsFile)
    
    GpioDataRegsFile 
    *          1    00006fc0    00000020     UNINITIALIZED
                      00006fc0    00000020     DSP280x_GlobalVariableDefs.obj (GpioDataRegsFile)
    
    GpioIntRegsFile 
    *          1    00006fe0    0000000a     UNINITIALIZED
                      00006fe0    0000000a     DSP280x_GlobalVariableDefs.obj (GpioIntRegsFile)
    
    SysCtrlRegsFile 
    *          1    00007010    00000020     UNINITIALIZED
                      00007010    00000020     DSP280x_GlobalVariableDefs.obj (SysCtrlRegsFile)
    
    SpiaRegsFile 
    *          1    00007040    00000010     UNINITIALIZED
                      00007040    00000010     DSP280x_GlobalVariableDefs.obj (SpiaRegsFile)
    
    SciaRegsFile 
    *          1    00007050    00000010     UNINITIALIZED
                      00007050    00000010     DSP280x_GlobalVariableDefs.obj (SciaRegsFile)
    
    XIntruptRegsFile 
    *          1    00007070    00000010     UNINITIALIZED
                      00007070    00000010     DSP280x_GlobalVariableDefs.obj (XIntruptRegsFile)
    
    AdcRegsFile 
    *          1    00007100    0000001e     UNINITIALIZED
                      00007100    0000001e     DSP280x_GlobalVariableDefs.obj (AdcRegsFile)
    
    SpibRegsFile 
    *          1    00007740    00000010     UNINITIALIZED
                      00007740    00000010     DSP280x_GlobalVariableDefs.obj (SpibRegsFile)
    
    ScibRegsFile 
    *          1    00007750    00000010     UNINITIALIZED
                      00007750    00000010     DSP280x_GlobalVariableDefs.obj (ScibRegsFile)
    
    SpicRegsFile 
    *          1    00007760    00000010     UNINITIALIZED
                      00007760    00000010     DSP280x_GlobalVariableDefs.obj (SpicRegsFile)
    
    SpidRegsFile 
    *          1    00007780    00000010     UNINITIALIZED
                      00007780    00000010     DSP280x_GlobalVariableDefs.obj (SpidRegsFile)
    
    I2caRegsFile 
    *          1    00007900    00000022     UNINITIALIZED
                      00007900    00000022     DSP280x_GlobalVariableDefs.obj (I2caRegsFile)
    
    CsmPwlFile 
    *          1    003f7ff8    00000008     UNINITIALIZED
                      003f7ff8    00000008     DSP280x_GlobalVariableDefs.obj (CsmPwlFile)
    
    
    GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 
    
    address    name
    --------   ----
    003f7000   .text
    003f796a   C$$EXIT
    003f77c8   FS$$MPY
    003f78be   FS$$TOL
    003f74f8   _ADCINT_ISR
    00000b00   _AdcMirror
    00007100   _AdcRegs
    000004a4   _BitData
    00000485   _CANTestFlag
    00000486   _CRC
    000004a0   _CmdMsg
    0000049c   _CmdRspMsg
    003f7855   _ConfigCpuTimer
    00000498   _Counters
    000004d0   _CpuTimer0
    00000c00   _CpuTimer0Regs
    000004c0   _CpuTimer1
    00000c08   _CpuTimer1Regs
    000004c8   _CpuTimer2
    00000c10   _CpuTimer2Regs
    003f7ff8   _CsmPwl
    00000ae0   _CsmRegs
    003f75cf   _CsmUnlock
    003f74f3   _DATALOG_ISR
    000080d4   _DSP28x_usDelay
    00000880   _DevEmuRegs
    003f7507   _DisableDog
    003f74ee   _ECAN0INTA_ISR
    003f74e9   _ECAN0INTB_ISR
    003f74e4   _ECAN1INTA_ISR
    003f74df   _ECAN1INTB_ISR
    003f74da   _ECAP1_INT_ISR
    003f74d5   _ECAP2_INT_ISR
    003f74d0   _ECAP3_INT_ISR
    003f74cb   _ECAP4_INT_ISR
    00006040   _ECanaLAMRegs
    000060c0   _ECanaMOTORegs
    00006080   _ECanaMOTSRegs
    00006100   _ECanaMboxes
    00006000   _ECanaRegs
    00006240   _ECanbLAMRegs
    000062c0   _ECanbMOTORegs
    00006280   _ECanbMOTSRegs
    00006300   _ECanbMboxes
    00006200   _ECanbRegs
    00006a00   _ECap1Regs
    00006a20   _ECap2Regs
    00006a40   _ECap3Regs
    00006a60   _ECap4Regs
    003f74c6   _EMPTY_ISR
    003f74c1   _EMUINT_ISR
    003f74bc   _EPWM1_INT_ISR
    003f74b7   _EPWM1_TZINT_ISR
    003f74b2   _EPWM2_INT_ISR
    003f74ad   _EPWM2_TZINT_ISR
    003f74a8   _EPWM3_INT_ISR
    003f74a3   _EPWM3_TZINT_ISR
    003f749e   _EPWM4_INT_ISR
    003f7499   _EPWM4_TZINT_ISR
    003f7494   _EPWM5_INT_ISR
    003f748f   _EPWM5_TZINT_ISR
    003f748a   _EPWM6_INT_ISR
    003f7485   _EPWM6_TZINT_ISR
    00006800   _EPwm1Regs
    00006840   _EPwm2Regs
    00006880   _EPwm3Regs
    000068c0   _EPwm4Regs
    00006900   _EPwm5Regs
    00006940   _EPwm6Regs
    003f7480   _EQEP1_INT_ISR
    003f747b   _EQEP2_INT_ISR
    00006b00   _EQep1Regs
    00006b40   _EQep2Regs
    003f7906   _EnableInterrupts
    003f73b5   _Fail
    00000481   _Flag
    00000a80   _FlashRegs
    003f7078   _GetADC
    00000482   _GotCan
    00000483   _GotWindOpen
    00006f80   _GpioCtrlRegs
    00006fc0   _GpioDataRegs
    00006fe0   _GpioIntRegs
    003f7476   _I2CINT1A_ISR
    003f7471   _I2CINT2A_ISR
    00007900   _I2caRegs
    003f746c   _ILLEGAL_ISR
    003f7467   _INT13_ISR
    003f7462   _INT14_ISR
    003f7992   _InitAdc
    003f7822   _InitCpuTimers
    003f7768   _InitECana
    003f774d   _InitECanaGpio
    003f769b   _InitECap2Gpio
    003f7668   _InitECapture
    003f774c   _InitEPwm
    003f7701   _InitEPwm1Gpio
    003f7717   _InitEPwm2Gpio
    003f772d   _InitEPwm3Gpio
    003f7745   _InitEPwmGpio
    003f76e6   _InitEPwmSyncGpio
    003f7029   _InitEPwmTimer
    000080b7   _InitFlash
    003f75fd   _InitGenGpio
    003f7000   _InitMessage
    003f7540   _InitPeripheralClocks
    003f78e7   _InitPieCtrl
    003f7930   _InitPieVectTable
    003f750f   _InitPll
    003f75c6   _InitSysCtrl
    003f76a9   _InitTzGpio
    003f70e4   _InitiatedBit
    00000480   _IntFlt
    003f7983   _MemCopy
    003f745d   _NMI_ISR
    003f7458   _PIE_RESERVED
    00000ce0   _PieCtrlRegs
    00000d00   _PieVectTable
    003f79ae   _PieVectTableInit
    003f7453   _RTOSINT_ISR
    003f40d8   _RamfuncsLoadEnd
    003f4000   _RamfuncsLoadStart
    00008000   _RamfuncsRunStart
    003f7106   _ReceiveCANMsg
    003f744e   _SCIRXINTA_ISR
    003f7449   _SCIRXINTB_ISR
    003f7444   _SCITXINTA_ISR
    003f743f   _SCITXINTB_ISR
    003f743a   _SEQ1INT_ISR
    003f7435   _SEQ2INT_ISR
    003f7430   _SPIRXINTA_ISR
    003f742b   _SPIRXINTB_ISR
    003f7426   _SPIRXINTC_ISR
    003f7421   _SPIRXINTD_ISR
    003f741c   _SPITXINTA_ISR
    003f7417   _SPITXINTB_ISR
    003f7412   _SPITXINTC_ISR
    003f740d   _SPITXINTD_ISR
    00007050   _SciaRegs
    00007750   _ScibRegs
    003f7111   _SendCANMsg
    003f717a   _SendCANTest
    003f74fd   _ServiceDog
    00000488   _SpdPeriod
    00007040   _SpiaRegs
    00007740   _SpibRegs
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    ffffffff   ___binit__
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    ffffffff   ___pinit__
    003f7000   ___text__
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    ffffffff   binit
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    ffffffff   pinit
    
    
    GLOBAL SYMBOLS: SORTED BY Symbol Address 
    
    address    name
    --------   ----
    00000000   __stack
    00000001   __TI_args_main
    00000400   __STACK_END
    00000400   __STACK_SIZE
    00000480   _IntFlt
    00000481   _Flag
    00000482   _GotCan
    00000483   _GotWindOpen
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    00000c00   _CpuTimer0Regs
    00000c08   _CpuTimer1Regs
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    00000ce0   _PieCtrlRegs
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    00006000   _ECanaRegs
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    00006080   _ECanaMOTSRegs
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    00008000   _RamfuncsRunStart
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    003f7aae   ___cinit__
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    003f7ff8   _CsmPwl
    ffffffff   ___binit__
    ffffffff   ___c_args__
    ffffffff   ___pinit__
    ffffffff   binit
    ffffffff   pinit
    
    [208 symbols]
    

    --silicon_version=28 
    -g 
    -O3 
    --define="LARGE_MODEL" 
    --quiet 
    --diag_warning=225 
    --large_memory_model 
    --obj_directory="C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release" 
    -z 
    -m"VGC.map" 
    --warn_sections 
    -i"C:/Program Files/Texas Instruments/ccsv4/tools/compiler/C2000 Code Generation Tools 5.2.10/lib" -i"C:/Program Files/Texas Instruments/ccsv4/tools/compiler/C2000 Code Generation Tools 5.2.10/include" -i"C:/TI/controlSUITE/device_support/f2801/v170/DSP280x_examples_ccsv4/ecap_capture_pwm" 
    --reread_libs 
    --rom_model 
    "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/VGC.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_usDelay.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_SysCtrl.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_PieVect.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_PieCtrl.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_MemCopy.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_GlobalVariableDefs.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_EPwm.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_ECap.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_ECan.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_DefaultIsr.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_CpuTimers.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_CodeStartBranch.obj" "C:/tidcs/c28/DSP280x/v170/DSP280x_examples_ccsv4/ecap_capture_pwm/Release/DSP280x_Adc.obj" -l"libc.a" "C:/TI/controlSUITE/device_support/f2801/v170/DSP280x_headers/cmd/DSP280x_Headers_nonBIOS.cmd" "../F2801.cmd" 

    Richard,

    If you are willing to share your project, send it to support@ti.com and reference this thread.  They will route it to me to take a look.  I won't be able to run the code since I won't have the external peripherals as on your setup, but I can see if I spot anything.

    Regards,

    Lori

     

  • Richard Shank said:

    Hi Lori,

    I tried building to 'Release' rather than 'Debug' to see if it made any difference.  I don't see any difference in the operation.  I also moved MemCopy to the beginning of main.  Still everything works fine when I boot from JTAG but cycle power and my CAN is ignored.

    I would stay away from "release".  A lot of the TI examples are not setup for release properly.  We have stopped including it whenever we update software.

    -Lori

     

  • Richard Shank said:
    Here are some screenshots of my linker configuration. 

    Richard,

    Unfortunately the screen shots did not come through.

    -Lori

  • Richard Shank said:
    If you notice, I'm running a 2801 and the .map file shows I'm including ECANB, EPWM4-6, and other options that don't exist on the 2801.  Apparently the switches in the .h files aren't excluding these.

    These are ok - the bit fields don't do anything in of themselves.  They are just used by code to access the registers.  Having the definition in your project won't take up any RAM or flash space and causes no harm if they are not accessed by your application.

    -Lori

  • Sorry, I guess I have to attach them if I expect you to see them.  ;^)  It's fixed now.

    I wish to send my project to you but I want to make sure you get the whole enchilada.  How do I do that?  Export to archive and send that?

    Most of my code doesn't require any external hardware other than a CAN interface.  I read a few GPIOs and the A/D.  I also output a PWM.  Other than that I talk to the CAN.  You can easily comment out any checks that keep the code from going through the main loop.  If you can make the CAN work when powering up from reset as well as JTAG, I think we're there.

    Thanks,

    Rick

  • Richard Shank said:
    Sorry, I guess I have to attach them if I expect you to see them.  ;^)  It's fixed now.

    No worries - I do that all the time :)

    Richard Shank said:
    I wish to send my project to you but I want to make sure you get the whole enchilada.  How do I do that?  Export to archive and send that?

    Yes, please try the export to archive option.  I've not had many projects passed to me using this - so my experience is limited - but it should get everything if it works as advertised.

    Regards,

    -Lori

  • Richard,

    So far I don't see anything strange.  The .map file generated is different than the one you posted though - perhaps an old version was posted.  For example ramfuncs allocation is shown in my .map as follows - and it makes sense.

    ramfuncs   0    003f4000    000000eb     RUN ADDR = 00008000
                    003f4000    000000cc     VGC.obj (ramfuncs)
                    003f40cc    0000001b     DSP280x_SysCtrl.obj (ramfuncs)
                    003f40e7    00000004     DSP280x_usDelay.obj (ramfuncs)

    There doesn't seem to be any initialized sections allocated with load addresses in RAM. 

    The stack seems ok - no overflow.

    The entry point to flash is correct.  

    You mentioned you can tell that the program starts at least, right from the GPIO changes early in the program?  If so, this indicates that the boot mode on your board is correct.

    Regards,

    -Lori

  • Richard,

    On your board, have you placed pull-ups on EMU0 and EMU1 and a pull-down on TRSTn as suggested in the data manual?  If not, can you try this and see if there is any difference?

    Regards,

    Lori

     

     

  • Hi Lori,

    I have 4.99K pull-ups on EMU0 and EMU1 and a 2.21K pull-down on TRSTn.  I do not however have pull-ups on GPIO18, GPIO29, and GPIO34.  There was a lot of confusion as to whether they were needed or not as they aren't on the development kit and the documentation said that the processor automatically pulled these signals HI during boot.  I did however put them on my next iteration (in build now) just in case.

  • Update 1

    Update 2

    If you have a 2808 docking station and a CAN interface you can load the code onto a 2808 too.  It did the same thing on the 2808 - runs fine when booted through the JTAG but won't recognize the CAN when booted from reset.

    Incidentally, if you disable the watchdog at the beginning of the main loop (around line 430), you can load the code and watch to see if it is actually running.  I may be performing that step incorrectly.  It will get stuck on the CAN transmit because it will wait for a CAN acknowledge (hence why it is necessary to disable the watchdog).  You can always comment out the CAN transmit line at the end of the main loop (SendCANTest();  around line 570) and the code should just go round and round the loop.

    I just remembered that my board runs off an external 100MHz crystal and the 2808 docking station runs off the internal PLL.  This means you will need to reconfigure the clock setup in the code.

  • Richard Shank said:

    Update 1

    Update 2

    If you have a 2808 docking station and a CAN interface you can load the code onto a 2808 too.  It did the same thing on the 2808 - runs fine when booted through the JTAG but won't recognize the CAN when booted from reset.

    Incidentally, if you disable the watchdog at the beginning of the main loop (around line 430), you can load the code and watch to see if it is actually running.  I may be performing that step incorrectly.  It will get stuck on the CAN transmit because it will wait for a CAN acknowledge (hence why it is necessary to disable the watchdog).  You can always comment out the CAN transmit line at the end of the main loop (SendCANTest();  around line 570) and the code should just go round and round the loop.

    I just remembered that my board runs off an external 100MHz crystal and the 2808 docking station runs off the internal PLL.  This means you will need to reconfigure the clock setup in the code.

    Thanks for the information, Richard.  I am using a 2808.   Right now I see the code go to the TX loop and wait.  I don't have a CAN node so I will need to get with one of our CAN experts to help me get that setup.  I am still looking for a hardware or software issue.  I don't see why the JTAG connected would cause the CAN to run or not.  It's the peripheral that does the work after all.   The next step is to see if I've correctly recreated the issue which requires a CAN node.  

    Regards,

    Lori

     

  • Hi Lori,

    Just to clarify, once the processor is booted you can remove the JTAG and it runs fine.  It just seems to need the JTAG to boot properly.  If I boot from reset, it appears to boot fine but won't recognize the CAN (TX or RX).

    It's an interesting problem to say the least.  I thank you for your assistance and hope I'm not too embarassed when you figure out what I'm doing wrong.  I hope my code isn't too difficult to follow.

    Thanks,

    Rick

  • Richard,

    I was able to get a test board with a can transceiver and a CANalyzer and tried the code out.   On this test board the code works without issue.  The CANalyzer reports no error frames.  I tried running without CCS connected from a cold power-on reset a number of times.  

    I took your code and dropped it into the header files and peripheral example release v1.70 I built the code with compiler version 5.2.11.  The map file generated is quite different from the one you posted.   I will attach it here for your reference.

    http://e2e.ti.com/cfs-file.ashx/__key/CommunityServer-Discussions-Components-Files/171/6355.Example_5F00_280xECap_5F00_Capture_5F00_Pwm.map

    The only changes I made were to comment out a call to InitECapture and InitGenGpio as these did not come across in the .zip.   I didn't see anywhere in the code that these functions would matter to the eCAN, though.

    You mentioned you are using an external clock and not the PLL.  In the code you sent I see a call to InitSysCtrl which  in turn sets up the PLL. Could this be the problem?  Having JTAG or not would not, however, change this behavior.

    Some other thoughts

    • Is there anything in the code composer gel file - OnReset, OnRestart, etc that could change the behavior?
    • Is power-on reset proper?  Is the external clock stable before CAN transmissions begin?

    .Maybe the community will have other suggestions.

    Regards,

    Lori

     

     

  • Thanks Lori,

    You've pointed out a few things I need to look into. 

    By the way, I actually sent the wrong .map file the first time (sorry, I'm new to this).  I sent a VGC.map that I believe came from the Release folder (because there wasn't a VGC.map in the Debug folder).  I've compared the Example_280xECap_Capture_Pwm.map file from the Debug folder with your map file using wincompare and they are identical.

    I have modified the DSP280x_SysCtrl.c file (it is included in the archive I sent you) to run off an external clock but I've noticed that there is still a 'SysCtrlRegs.XCLK.bit.XCLKOUTDIV=2' command left in the file.  I'll check to see if that is causing the problem.  I already had to fix one rechange of the XCLKOUTDIV commands in this file before because it was causing CAN problems. 

    Also, you mention the gel file.  I keep getting a warning that some gel commands aren't recognized when I load the code.  I'm currently disassembled right now but I'll look into this too when I'm set up again.

    Power on reset is held low for 200ms by a power on reset chip.  I think that's ok.

    Thanks, I'll get back to you soon.

    Rick

  • Hi Lori,

    I'm back together and checked a couple things.

    * The 'SysCtrlRegs.XCLK.bit.XCLKOUTDIV=2' made no difference when changed to 1.  It turns out that my prior issue was with the CLKINDIV variable.

    * I no longer get gel command warnings.  I don't know if they went away or if I just don't have the proper window open any more.  I'll keep an eye out for it and report it if I see it again.

    I'm wondering if I'm accidentally setting up the PLL when I don't intend to (with my SysCtrl.c).  I wish I had done things the same way as the docking station but I think we were just in too much of a hurry to get hardware and I wasn't sure how to run the processor yet.

    Thanks,  I'll keep digging.

    Rick

  • Richard Shank said:
    I have modified the DSP280x_SysCtrl.c file (it is included in the archive I sent you) to run off an external clock but I've noticed that there is still a 'SysCtrlRegs.XCLK.bit.XCLKOUTDIV=2' command left in the file. 

    Hi Richard,

    I know what happened on my end. The DSP280x_Examples.h did not come through in the .zip so I picked up the standard file in the headers.  This has DSP28_PLLCR set to 10.  My guess is in your case you have DSP28_PLLCR set to 0 and DSP28_CLKINDIV set to 1.

    Sorry for the false alarm.

    Regards,

    Lori

  • Hi Lori,

    You are correct.  I'm going to go back through the code to see if there is anything else I changed that didn't come through.  This was my worry with the archiving.  I had to move some other files to my other computer when I moved the code.  I'll get back to you.  Anyway, here is my Examples.h.

     

    2867.DSP280x_Examples.zip

     

  • Hi Lori,

    I checked and to my knowledge, examples.h is the only .h file that was changed.  The rest were .c files which were included with the archive.

    Is there some way to download the code in the processor and compare it with the code I'm using when I boot from JTAG?  Perhaps this will help me see what is different in the memory between the two conditions.  Something has to be happening that is different.  I can see the assembly when I connect and load symbols but I'm just looking at a small window.  It would be nice to dump the whole flash contents (and possibly RAM) and see just what is different.

    Thanks,

    Rick

     

     

  • Hi Lori,

    Perhaps I'm not describing what I'm doing correctly.  Instead of saying I'm booting from JTAG, I think it is more correct to say I must load the program with CCS or it won't run.  I tried booting from a cold start (power cycle) and connecting to the target.  I then reset the CPU and tried to run.  Like usual, it ran but I had no CAN.  Then I tried Target -> Load Program, Run and everything ran fine.

    Could I be programming the processor wrong?

    By the way, I finally noticed the gel warnings again.  It turns out the wiki claims these are deprecated functions so I'm guessing that might not be the issue (unless for some reason I'm trying to run the wrong gel file?).

  • Richard Shank said:
    Perhaps I'm not describing what I'm doing correctly.  Instead of saying I'm booting from JTAG, I think it is more correct to say I must load the program with CCS or it won't run.  I tried booting from a cold start (power cycle) and connecting to the target.  I then reset the CPU and tried to run.  Like usual, it ran but I had no CAN.  Then I tried Target -> Load Program, Run and everything ran fine.

    Hi Richard,

    This is often a symptom of an initialized section getting loaded into RAM instead of flash.  Code Composer can do this as part of the load process.  Here are a couple of suggestions:

    Idea 1: Double check the .cmd and .map files for any initialized sections with a load address in RAM.

    Idea 2: Debug the code by loading symbols only:

    • Flash the program.
    • Power cycle the device.  This will "corrupt" anything that was in RAM.
    • Connect CCS to the target
    • Import the project
    • Now instead of flashing the code, do the following: target -> load symbols and select the .out file.
    • target->reset->reset CPU   This will start the code from the reset vector in the boot ROM.
    • target -> go to main
    • debug your code as you normally would.  Since you loaded symbols CCS knows what source files correspond to the code in flash.

     

    Idea 3: Fill the RAM with a known value and then compare it to what gets loaded into RAM.

    • Fill the RAM with a known value
      • Option 1: Using the scripts -> initialize memory map -> fill with ESTOP0. 
        This will fill all the RAM locations with the value of the ESTOP opcode which is 0x7625.
        You can modify the gel function to change the value to 0xFFFF if it makes it easier to inspect the memory.  (tools -> gel files).  
      • Option 2: Using the memory window (view -> memory)
        There is a little green up arrow pulldown menu on the memory window.  click this and select "fill".  You can specify the start/range and the value to fill with.

    • Once you have filled the RAM with a known value, you can tell the flash programmer to ONLY load RAM. 
      • Go to tools-> on-chip flash
      • Select "load RAM only" 
      • Then load your code.  target -> load program
      • You can then inspect the RAM for any areas that have been changed.  
      • If you want save the memory contents to a file you can use the green up arrow menu again, select "save" and then specify a start and range to save.

     

  • Hi Lori,

    I chose to start with Idea 3, option 2.  It proved fruitful but I don't fully understand the results.  It looks like some of my variables (from my VGC.c and message.h) ended up in the RAM with some other stuff.  Here are screen shots of RAMM0 (0x0000 - 0x0400), BOOT_RSVD (0x0400 - 0x0480),  and RAMM1 (0x0480 - 0x0800).  It's just a Microsoft Word document.  I originally set them all to FFFF to make the changes obvious.  There's also some stuff that got put into 0x0000 - 0x0003 and I'm not sure but I think 0x0800 should still be FFFF.

    8737.0x0000.doc

    Thanks,

    Rick

  • Rick,

    Something else I should have asked you to do is to turn off any auto run options.  My thoughts are this is CCS is initiating a "run to main" and thus the variables are initialized. 

    To turn this off go to tools->debugger options->general options and make sure no auto run features are selected.

     

     

    -Lori

  • Updates

    Hi Lori,

    I turned off autorun and now there is nothing written to the RAM after a program load.  All my RAM remains FFFF.  My RAM looks ok.

    I put a scope on my CAN bus (after booting up from reset) and I'm now seeing data coming out at the wrong frequency.  I don't remember ever seeing this before (possibly because now I have watchdog disabled) but I am transmitting data.  When I load the program from CCS, my smallest bit is 6us wide.  When I start from reset, my smallest bit is about 16us wide.  Somehow my CAN is operating at a different frequency when the code is loaded from CCS than when I boot from reset.  When I load from CCS my CAN operates properly at 125Kbps.  When I come out of reset, my CAN operates somewhere around 57Kbps.

    This would explain why my CAN is not acknowledging transmission or reception.  Now what would cause the CAN operating frequency (probably set by the divider) to be different depending on if I load the code from CCS or if I boot from reset?  This doesn't make much sense.  Is the CAN baud rate affected by anything in my hardware setup.

    Thanks,

    Rick

    P.S.  Is it possible for me to put my hardware in my car and bring it to TI?  I'm sure you or your people could get to the bottom of this much faster than I can.  I don't have enough experience with this processor or these tools to troubleshoot quick enough.

  • Rick,

    I should have asked this a long while back - I apologize that I did not.

    Does this happen on more than one device/board? What revision is the device?  I'm now wondering if the device is damaged or an old TMX sample.

    Can you monitor the reset line and see if the watchdog is resetting the device - even though it is disabled?   We had a watchdog errata on early devices in this family.

    Regards,

    Lori

  • Update

    Hi Lori,

    This issue occurs on both revisions of my circuit board with two different processors.  I have checked the watchdog and it is resetting when enabled.  It reset because it was waiting for the CAN acknowledge that never came.  This is why I wasn't seeing any CAN bus activity before with my scope.  Now that I have disabled my watchdog I can see the CAN is operating, it's just at the wrong frequency. 

    I'm supposed to be communicating at 125Kbps and when I load the code from CCS, it communicates at 125Kbps.  When I come up out of reset, it communicates somewhere around 57Kbps.  This explains why my CAN is not getting acknowledged.

    I went through the code yesterday for the CAN setup looking at what gets loaded from CCS and what I have when I boot out of reset.  I found no difference.  The code section is 0x3F73B7 to about 0x3F7591.  I also went through all my C code looking for where I set the clocks and could find nothing wrong.  I know I must be doing something wrong but it's quite elusive.  Any ideas on where else I should be looking now that I know it's my frequency that's changing?

    The numbers on my microprocessor are:

    6CAE97W

    SM320F2801PZMEP

    G4

    With the exception of the part number, the other numbers don't match the format of the device markings in Figure 1 of SPRZ171L so I'm not sure what revision we have.

    Thanks,

    Rick

    I also checked XCLKOUT for both cases and both are running at 50MHz.  I checked my crystal input and it's stable in about 30 nanoseconds.  I have a 200ms power up delay before I turn loose reset.

  • Hi Lori,

    I just found something in SPRU722 at the bottom of page 30.  It says something regarding the MCLKSTS (missing clock detect bit) in the PLL status register.  I do shut off the PLL (I think - don't really know if I did it correctly) but I don't check MCLKSTS and hence I don't take appropriate action if this bit is set.  Is this something to investigate further?

    Thanks,

    Rick

     

  • Richard Shank said:

    The numbers on my microprocessor are:

    6CAE97W

    SM320F2801PZMEP

    G4

    Richard,

    If this is still an issue, can you check location 0x0883 and tell me what number is there?  I want to figure out what revision of the silicon it is and if the watchdog errata applies.

    Thank you

    Lori

     

  • Hi Lori,

    I think I might have found a solution.  I found an issue with the InitPll subroutine.  I had to add 4 lines to the end to ensure that the clkindiv was actually set.  It seems to work ok now.  I have attached the original InitPll and the modified InitPll (see the added code at the bottom of the routine).  I think the problem was because I'm bypassing the PLL altogether.  I run directly off a 100MHz crystal.

    void InitPll(Uint16 val, Uint16 clkindiv)
    {
       volatile Uint16 iVol;
    
       // Make sure the PLL is not running in limp mode
       if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 0)
       {
          // Missing external clock has been detected
          // Replace this line with a call to an appropriate
          // SystemShutdown(); function.
          asm("        ESTOP0");
       }
    
       // CLKINDIV MUST be 0 before PLLCR can be changed from
       // 0x0000. It is set to 0 by an external reset XRSn
       if (SysCtrlRegs.PLLSTS.bit.CLKINDIV != 0)
       {
           EALLOW;
           SysCtrlRegs.PLLSTS.bit.CLKINDIV = 1;
           EDIS;
       }
    
       // Change the PLLCR
       if (SysCtrlRegs.PLLCR.bit.DIV != val)
       {
    
          EALLOW;
          // Before setting PLLCR turn off missing clock detect logic
          SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1;
          SysCtrlRegs.PLLCR.bit.DIV = val;
          EDIS;
    
          // Optional: Wait for PLL to lock.
          // During this time the CPU will switch to OSCCLK/2 until
          // the PLL is stable.  Once the PLL is stable the CPU will
          // switch to the new PLL value.
          //
          // This time-to-lock is monitored by a PLL lock counter.
          //
          // Code is not required to sit and wait for the PLL to lock.
          // However, if the code does anything that is timing critical,
          // and requires the correct clock be locked, then it is best to
          // wait until this switching has completed.
    
          // Wait for the PLL lock bit to be set.
          // Note this bit is not available on 281x devices.  For those devices
          // use a software loop to perform the required count.
    
          // The watchdog should be disabled before this loop, or fed within
          // the loop via ServiceDog().
    
    	  // Uncomment to disable the watchdog
          DisableDog();
    
          while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1)
          {
    	      // Uncomment to service the watchdog
              // ServiceDog();
          }
    
          EALLOW;
          SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0;
          SysCtrlRegs.PLLSTS.bit.CLKINDIV = clkindiv;
          EDIS;
        }
    }

    void InitPll(Uint16 val, Uint16 clkindiv)
    {
       volatile Uint16 iVol;
    
       // Make sure the PLL is not running in limp mode
       if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 0)
       {
          // Missing external clock has been detected
          // Replace this line with a call to an appropriate
          // SystemShutdown(); function.
          asm("        ESTOP0");
       }
    
       // CLKINDIV MUST be 0 before PLLCR can be changed from
       // 0x0000. It is set to 0 by an external reset XRSn
       if (SysCtrlRegs.PLLSTS.bit.CLKINDIV != 0)
       {
           EALLOW;
           SysCtrlRegs.PLLSTS.bit.CLKINDIV = 1;
           EDIS;
       }
    
       // Change the PLLCR
       if (SysCtrlRegs.PLLCR.bit.DIV != val)
       {
    
          EALLOW;
          // Before setting PLLCR turn off missing clock detect logic
          SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1;
          SysCtrlRegs.PLLCR.bit.DIV = val;
          EDIS;
    
          // Optional: Wait for PLL to lock.
          // During this time the CPU will switch to OSCCLK/2 until
          // the PLL is stable.  Once the PLL is stable the CPU will
          // switch to the new PLL value.
          //
          // This time-to-lock is monitored by a PLL lock counter.
          //
          // Code is not required to sit and wait for the PLL to lock.
          // However, if the code does anything that is timing critical,
          // and requires the correct clock be locked, then it is best to
          // wait until this switching has completed.
    
          // Wait for the PLL lock bit to be set.
          // Note this bit is not available on 281x devices.  For those devices
          // use a software loop to perform the required count.
    
          // The watchdog should be disabled before this loop, or fed within
          // the loop via ServiceDog().
    
    	  // Uncomment to disable the watchdog
          DisableDog();
    
          while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1)
          {
    	      // Uncomment to service the watchdog
              // ServiceDog();
          }
    
          EALLOW;
          SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0;
          SysCtrlRegs.PLLSTS.bit.CLKINDIV = clkindiv;
          EDIS;
        }
    
      EALLOW;
      SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0;
      SysCtrlRegs.PLLSTS.bit.CLKINDIV = clkindiv;
      EDIS;
    }
    

    Thanks,

    Rick

  • By the way, this is what I found in 0x0883...

  • Richard,

    Can you try data space, please.  (the pulldown where it says "program").

    Regards,

    Lori