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TMS320F280049: non-master CPU fetch violation

Jane huang
Prodigy 110 points

Part Number: TMS320F280049

hello,dear

I am performing an illegal fetch from CPU as part of SRAM10 test, following SDL example "RAM access protection violation detection". Set memory LS6 as program memory for CLA. Now the fetch from CPU Calling this function (which has been placed in LS6) will cause a CPU fetch access violation. 
 But it will go to illegalISR() and stuck in it, it remains running  in the interrupt. at last, come to Break at address "0x3fb02a" with no debug information available, or outside of program code.

My question is : how to break out of the illegal interrupt and running the normal program.

#pragma CODE_SECTION(testCPUFetchFunc,"ramls6");
void testCPUFetchFunc(void);

uint32_t generateNonMasterCPUFetchViolation()
{
uint16_t fail = 0U;
uint16_t timeout = ISR_LOOP_TIMEOUT;

//
// Enable violation interrupt
//
MemCfg_enableViolationInterrupt(MEMCFG_NMVIOL_CPUFETCH);

//
// Memory is shared between CLA & CPU.
//
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS6, MEMCFG_LSRAMMASTER_CPU_CLA1);

//
// Set memory as program memory for CLA. Now the fetch from CPU
// will result in a non-master CPU fetch violation.
//
MemCfg_setCLAMemType(MEMCFG_SECT_LS6, MEMCFG_CLA_MEM_PROGRAM);

//
// Clear access violation status variables
//
illegalISRFlag = false;
violationISRFlag = false;
violationAddr = 0U;
violationStatus = 0U;

//
// Calling this function (which has been placed in LS1) will cause a CPU
// fetch access violation.
//
testCPUFetchFunc();

//
// The violation will generate both an ITRAP interrupt and the RAM access
// violation interrupt.
//
while(((illegalISRFlag != true) || (violationISRFlag != true)) &&
(timeout != 0U))
{
timeout--;
}

//
// Disable interrupt.
//
MemCfg_disableViolationInterrupt(MEMCFG_NMVIOL_CPUFETCH);

//
// Check if interrupt occurred as expected or if the loop timed out.
//
if(timeout == 0U)
{
fail++;
}

//
// Check if the violation address was testCPUFetchFunc().
//
if(violationAddr != (uint32_t)&testCPUFetchFunc)
{
fail++;
}

//
// Confirm the expected violation type was detected.
//
if((violationStatus & MEMCFG_NMVIOL_CPUFETCH) == 0U)
{
fail++;
}

return(fail);
}

void testCPUFetchFunc(void)
{
NOP;
}

__interrupt void illegalISR(void)
{
illegalISRFlag = true;

//
// Need to remove the protection on LS6RAM to allow us to return.
//
MemCfg_setProtection(MEMCFG_SECT_LS6, MEMCFG_PROT_ALLOWCPUFETCH);
MemCfg_setCLAMemType(MEMCFG_SECT_LS6, MEMCFG_CLA_MEM_DATA);
}

  • 0
    Prodigy 110 points

    the map for ram section [b000, b827] is ITRAP0.

    00b81a: 0000 ITRAP0
    00b81b: 0000 ITRAP0
    00b81c: 0000 ITRAP0
    00b81d: 0000 ITRAP0
    00b81e: 0000 ITRAP0
    00b81f: 0000 ITRAP0
    00b820: 0000 ITRAP0
    00b821: 0000 ITRAP0
    00b822: 0000 ITRAP0
    00b823: 0000 ITRAP0
    00b824: 0000 ITRAP0
    00b825: 0000 ITRAP0
    00b826: 0000 ITRAP0
    00b827: 0000 ITRAP0

  • 0 in reply to Jane huang
    Prodigy 110 points

     when running the SRAM10 test, following SDL example.

    running with single step, the address "0x8803" will go to  Break at address "0x8803" with no debug information available, or outside of program code. 

    RAMLS1                00008800   00000800  00000003  000007fd  RWIX

    how to solve that problem?

  • 0 in reply to Jane huang
    TI__Guru 50611 points

    Hi,

    Due to US holiday, please expect response by tomorrow, Feb 22. Sincere apology for inconvenience.

  • 0 in reply to Santosh Jha
    TI__Guru 50611 points

    Hi,

    The subject matter expert is out of office today and will get back to you in couple of days.

  • 0 in reply to Jane huang
    TI__Guru 54415 points

    Hi Jane, thanks for your patience. It is odd that testCPUFetchFunc is shown as being located at 0x8800 in your Disassembly window when you've used CODE_SECTION(testCPUFetchFunc,"ramls6") to place it in LS6. Can you check in your cmd file how ramls6 is defined?

    Whitney

  • 0 in reply to Whitney Dewey
    TI__Guru 54415 points

    Also note in the SDL example (which originally uses LS1 instead of LS6), we make sure to copy the contents of ramls1 (the testCPUFetchFunc) from flash to RAM, so there won't be an ITRAP stored there.

       ramls6           : > RAMLS6,     PAGE = 1
   ramgs0           : > RAMGS0,     PAGE = 1

   ramls1           : LOAD = FLASH_BANK0_SEC3,
                      RUN = RAMLS1,
                      LOAD_START(ramls1LoadStart),
                      LOAD_SIZE(ramls1LoadSize),
                      RUN_START(ramls1RunStart),
                      PAGE = 0, ALIGN(4)

    Whitney

  • 0 in reply to Whitney Dewey
    Prodigy 110 points

    thanks for help

    copy the contents of ramls1 (the testCPUFetchFunc) from flash to RAM,the disassembly shows below.  still it does not has a return, and will jump to Break at address "0xb003" with no debug information available, or outside of program code  when debug with single step. how can that be happen?

    i change file of my project ( sdl_ex_ram_access_protect.c,   *.cla，*.cmd) to SDL example(sdl_ex_ram_access_protect project), it runs ok. the difference is the *.h file?

     

  • 0 in reply to Jane huang
    TI__Guru 54415 points

    Do you mind sharing the lines your .cmd file where you set up the RamFusaRunStart, RamFusaLoadStart, etc...symbols and where you do the memcpy? Do you have any security enabled on LS6 that could be preventing the copy?

    Whitney