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TMS320F28388D: What is Shadow Fifo in EPWM Module?

Erhan(engineerhan)
Intellectual 505 points

Part Number: TMS320F28388D

Hi all!

Shadow fifo mentioned 4 times in the TRM. Is htere more info about it?

thanks in advance.

cheers,

TRM Page 2869

  • 0
    TI__Guru 50611 points

    Hi,

    Due to US holiday, please expect response by tomorrow, Feb 22. Sincere apology for inconvenience.

  • +1 in reply to Santosh Jha
    TI__Mastermind 26960 points

    Hi Erhan,

    This is just referring to the temporary location the CMPA and CMPB values are stored in if the shadow to active load feature is used. There is more content about shadow registers within the counter compare section of the EPWM chapter of the Technical Reference Manual. Here is a small excerpt, "The shadow mode for the CMPA is enabled by clearing the CMPCTL[SHDWAMODE] bit and the shadow register for CMPB is enabled by clearing the CMPCTL[SHDWBMODE] bit. Shadow mode is enabled by default for both CMPA and CMPB. If the shadow register is enabled then the content of the shadow register is transferred to the active register on one of the following events as specified by the CMPCTL[LOADAMODE], CMPCTL[LOADBMODE], CMPCTL[LOADASYNC], and CMPCTL[LOADBSYNC] register bits..."

    Best Regards,

    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    Intellectual 505 points

    Hi Marlyn!

    Thanks for your answer. You can say every single register is also a FIFO/LIFO with a length of 1word/byte :)  

    You say it is referring to shadow registers of COMPA/B right? Then i say the word FIFO might be confusing. Anyways.

    I use sahdow registers also. Please let me understand. This bit SHDWxFULL bit is to prevent overriding to related shadow registers before it is copied to active registers right?

    thanks in adavnce.

    cheers,

  • 0 in reply to Erhan(engineerhan)
    TI__Mastermind 26960 points

    Hi Erhan,

    Erhan(engineerhan) said:
    You say it is referring to shadow registers of COMPA/B right? Then i say the word FIFO might be confusing. Anyways.

    Yes, I agree with you. I have also filed this to get changed for the next revision of the document.

    Erhan(engineerhan) said:
    This bit SHDWxFULL bit is to prevent overriding to related shadow registers before it is copied to active registers right?

    Correct, this bit will be a 1 when you have written to the shadow register but the value has not yet been transferred over to the active register. 

    Best Regards,

    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    Intellectual 505 points

    Hi Marlyn!

    Thanks for agreement. :)  Interesting feature.

    EPWM_INT_TBCTR_ZERO_OR_PERIOD

    Do you have also EPWM interrupt type flags? I use same vector for counter=zero or period interrupts and want to know which is occured in the interrupt call. I went through driverlibs functions but didnt see anything. Could you please tell me how to do it?

    cheers,

  • 0 in reply to Erhan(engineerhan)
    TI__Mastermind 26960 points

    Hi Erhan,

    Erhan(engineerhan) said:
    Do you have also EPWM interrupt type flags?

    This is not something that we have.

    Erhan(engineerhan) said:
    Could you please tell me how to do it?

    Are you using an up-down count mode? What you could potentially do as a work around is read the TBCTR value within the ISR. This would give you some indication of whether it was a zero or period event that triggered the interrupt. The TBCTR value will most likely not be 0 or TBPRD by the time the ISR is entered but you can always define a range that fits for your application. 

    Best Regards,

    Marlyn