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TMS320F28388D: Abnormal program termination

pranay r
Intellectual 390 points

Part Number: TMS320F28388D

Hello team,

I'm using sys bios + driver lib + flash lib for my development.

I'm facing a problem here, I have a GPIO connected and as configured as interrupt for both edges.

I'm getting an interrupt and is hitting callback ISR function but after that execution is stuck in exit.c Abort() function.

Below is my linker file:

Fullscreen 7356.linker file.txt Download 
/*
 * Copyright (c) 2018-2019, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/*
 *  ======== TMS320F2838X1.cmd ========
 *  Define the memory map for Cpu 1 of TMS320F2838X.
 */
MEMORY
{
   /* BEGIN is used for the "boot to Flash" bootloader mode */
   BEGIN            : origin = 0x084000, length = 0x000002
   //BEGIN            : origin = 0x080000, length = 0x000002

   /* Part of M0, BOOT rom will use this for stack */
   BOOT_RSVD        : origin = 0x000002, length = 0x0001AE

   RAMM0            : origin = 0x0001B0, length = 0x000250
   RAMM1            : origin = 0x000400, length = 0x000400

	//GRL-EDIT
   //RAMM2			: origin = 0x002400, length = 0x001000
   /*RAMM3			: origin = 0x001800, length = 0x001000
   RAMM4			: origin = 0x002800, length = 0x001000
   RAMM5			: origin = 0x003800, length = 0x001000
   RAMM6			: origin = 0x004800, length = 0x001000
   RAMM7			: origin = 0x005800, length = 0x001000
   RAMM8			: origin = 0x006800, length = 0x001000
   RAMM9			: origin = 0x007800, length = 0x000200*/


   RAMD0            : origin = 0x00C000, length = 0x000800
   RAMD1            : origin = 0x00C800, length = 0x000800

   RAMLS0_5         : origin = 0x008000, length = 0x003000
/*
   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x000800
*/
   RAMLS6           : origin = 0x00B000, length = 0x000800
   RAMLS7           : origin = 0x00B800, length = 0x000800

   RAMGS0           : origin = 0x00D000, length = 0x001000
   RAMGS1           : origin = 0x00E000, length = 0x001000
   RAMGS2           : origin = 0x00F000, length = 0x001000
   RAMGS3           : origin = 0x010000, length = 0x001000
   RAMGS4           : origin = 0x011000, length = 0x001000
   RAMGS5           : origin = 0x012000, length = 0x001000
   RAMGS6           : origin = 0x013000, length = 0x001000
   RAMGS7           : origin = 0x014000, length = 0x001000

   RAMGS8           : origin = 0x015000, length = 0x001000
   RAMGS9           : origin = 0x016000, length = 0x001000
   RAMGS10          : origin = 0x017000, length = 0x001000
   RAMGS11          : origin = 0x018000, length = 0x001000
   RAMGS12          : origin = 0x019000, length = 0x001000
   RAMGS13          : origin = 0x01A000, length = 0x001000
   RAMGS14          : origin = 0x01B000, length = 0x001000
   RAMGS15          : origin = 0x01C000, length = 0x001000

   /* Flash sectors */
   BOOTPGM           : origin = 0x080002, length = 0x000002  /* on-chip Flash */
   FLASH0           : origin = 0x080004, length = 0x001FFC  /* on-chip Flash */
   //FLASH0           : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
   FLASH1           : origin = 0x082000, length = 0x002000 /* on-chip Flash */
   FLASH2           : origin = 0x084002, length = 0x001FFE /* on-chip Flash */
   FLASH3           : origin = 0x086000, length = 0x002000 /* on-chip Flash */
   FLASH4           : origin = 0x088000, length = 0x008000 /* on-chip Flash */
   FLASH5           : origin = 0x090000, length = 0x008000 /* on-chip Flash */
   FLASH6           : origin = 0x098000, length = 0x008000 /* on-chip Flash */
   FLASH7           : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
   FLASH8           : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
   FLASH9           : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
   FLASH10          : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
   FLASH11          : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
   FLASH12          : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
   FLASH13          : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

   CPU1TOCPU2RAM    : origin = 0x03A000, length = 0x000800
   CPU2TOCPU1RAM    : origin = 0x03B000, length = 0x000800

   CPUTOCMRAM       : origin = 0x039000, length = 0x000800
   CMTOCPURAM       : origin = 0x038000, length = 0x000800

   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800

   RESET            : origin = 0x3FFFC0, length = 0x000002
}

SECTIONS
{
   codestart        : > BEGIN

   .text            : >> FLASH2 | FLASH3 | FLASH4 | FLASH5 |
                        FLASH6 | FLASH7 | FLASH8 | FLASH9 | FLASH10 | FLASH11 |
                        FLASH12 | FLASH13

   .cinit           : > FLASH2 | FLASH3 | FLASH4 | FLASH5 |
                        FLASH6 | FLASH7 | FLASH8 | FLASH9 | FLASH10 | FLASH11 |
                        FLASH12 | FLASH13

   .switch          : > FLASH2 | FLASH3 | FLASH4 | FLASH5 |
                        FLASH6 | FLASH7 | FLASH8 | FLASH9 | FLASH10 | FLASH11 |
                        FLASH12 | FLASH13

   .reset           : > RESET, TYPE = DSECT /* not used, */

   //.stack           : > RAMM1 | RAMD0 |RAMD1 |RAMGS13
	.stack           : > RAMM1 | RAMLS0_5

   .bss             : > RAMLS0_5

   .bss:output      : > RAMLS6

//	.stack           : > RAMM1 | RAMM2 | RAMM3

//	.bss             : > RAMLS0_5

//	.bss:output      : > RAMLS6

   .init_array      : > FLASH2 | FLASH3 | FLASH4 | FLASH5

   .const           : > FLASH2 | FLASH3 | FLASH4 | FLASH5 |
                        FLASH6 | FLASH7 | FLASH8 | FLASH9 | FLASH10 | FLASH11 |
                        FLASH12 | FLASH13

   .data            : >> RAMGS0 | RAMGS1 | RAMGS2 |RAMGS3 | RAMGS4

   .sysmem          : >> RAMGS0 | RAMGS1 | RAMGS2 |RAMGS3 | RAMGS4

   .binit           : > FLASH2 | FLASH3 | FLASH4

   ramgs0           : > RAMGS0
   ramgs1           : > RAMGS1

   .TI.ramfunc : {} LOAD = FLASH3,
                     RUN = RAMGS8 | RAMGS9, table(BINIT),
                     LOAD_START(RamfuncsLoadStart),
                     LOAD_SIZE(RamfuncsLoadSize),
                     LOAD_END(RamfuncsLoadEnd),
                     RUN_START(RamfuncsRunStart),
                     RUN_SIZE(RamfuncsRunSize),
                     RUN_END(RamfuncsRunEnd),
                     PAGE = 0, ALIGN(4)

   MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
   MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
   MSGRAM_CPU_TO_CM    > CPUTOCMRAM,    type=NOINIT
   MSGRAM_CM_TO_CPU    > CMTOCPURAM,    type=NOINIT
}

My Project screenshot:

Error window hierarchy:

.cfg declarations :

BIOS.heapSize = 0x2200;

Program.stack = 0x800;

Properties screenshot:

I tired increasing sizes but ending up with different errors related to linker.

can anyone please let me know what could be the issue here.

--Pranay

  • 0
    TI__Mastermind 32655 points

    The interrupt ISRs are not declared with __interrupt keyword. This is required if the interrupt is directly registered in PIE.

    Regards,

    Veena

  • +1
    TI__Guru 54365 points

    Hi Pranay,

    I want to clarify a few points about interrupts in SYS/BIOS. When using SYS/BIOS you should be creating Hwi instances for all of your interrupts and let SYS/BIOS manage the configuration of the PIE and the vector table. For example, in your software you shouldn't call any of the Interrupt_* driverlib functions, but instead use equivalent SYS/BIOS Hwi module functions.

    Also, for SYS/BIOS Hwi function, you should not use the __interrupt keyword. Hwi functions are actually functions called by the Hwi dispatcher--the Hwi dispatcher is the SYS/BIOS function that is actually plugged in the PIE vector table. This Hwi dispatcher is an important part of the SYS/BIOS scheduler, so you need to take care not to overwrite it by calling Interrupt_* driverlib functions.

    Whitney

  • 0 in reply to Whitney Dewey
    Intellectual 390 points

    Hi Whitney,

    Thanks for the extra details.

    If we should not use any interrupt_* related functions if we're using sys/bios, How do we assign a interrupt to a GPIO.

    Can you please shed some light here about the usage of .cfg file and documents related to usage of .cfg file

    --pranay

  • 0 in reply to pranay r
    TI__Guru 54365 points
    pranay r said:
    How do we assign a interrupt to a GPIO

    Like using an XINT to generate an interrupt on a pin toggle? You can still call the interrupt related GPIO_* functions--GPIO_setInterruptPin, GPIO_enableInterrupt, etc...--but instead of using the Interrupt_* functions to configure the PIE, set up a HWI for the INT_XINTn instead. Basically, you still need to configure the interrupt at the peripheral level, but in the PIE/NVIC and in the CPU, you should do the configuration through SYS/BIOS functions.

    pranay r said:
    Can you please shed some light here about the usage of .cfg file and documents related to usage of .cfg file

    .cfg files in general? Or some specific aspect of them. There's the SYS/BIOS User's Guide and the SYS/BIOS API reference documentation to start. Importing SYS/BIOS examples and studying their .cfg files can be helpful too.

    Whitney