TMS320F28069M: RTOS Unwanted SW Break

I do have an ESTOP0 in my HWI and it is triggered when a rising edge is detected before the ISR is serviced. What causes this to happen?

Void PWMInput3HWI()
{
    unsigned long Measurement[2] = {0};
    unsigned int HighPeriod = 0;
    unsigned int LowPeriod = 0;

    EALLOW;
        if (HRCap1Regs.HCIFR.bit.RISEOVF == 1)
            ESTOP0;           // Another rising edge detected before ISR serviced.

        if (first==0)
            first = 1;  // Discard first data (because first interrupt after reset/clk enable measures time from clock start to edge instead of valid pulse width)
        else
        {
            HRCap1Regs.HCCTL.bit.RISEINTE = 0;  // Disable rising edge interrupts

            HighPeriod = HRCap1Regs.HCCAPCNTFALL1 + 1;     // Capture current high pulse width in HCCAPCLK cycles
            LowPeriod = HRCap1Regs.HCCAPCNTRISE0 + 1;    // Capture low pulse width immediately preceding high pulse width in HCCAPCLK cycles

            Measurement[HIGHPERIOD] = HighPeriod;
            Measurement[PERIOD] = HighPeriod + LowPeriod;
            Mailbox_post(PWMInput3Measurement, &Measurement, BIOS_NO_WAIT);
        }

        HRCap1Regs.HCICLR.all = 0x001F;       // Clear all HRCAP interrupts
        HRCap1Regs.HCCTL.bit.RISEINTE = 1;    // Re-enable rising edge interrupts

        HRCap1Regs.HCICLR.bit.INT=1;          // Clear HRCAP interrupt flag
        PieCtrlRegs.PIEACK.bit.ACK4=1;        // Acknowledge PIE Group 4 interrupts
    EDIS;
}

Hi,

Please let me know if you were able to resolve this issue.

Thanks
Vasudha