TMS320F28386D: EMAC: Additional words in reception buffer

Hello,

I would appreciate getting an answer on this topic.

Thanks,

Clément

Clément,

Sorry, currently  I am out of office and hence could not reply to your message.   Will take a look at it by mid of this week,

In the meantime, pls let me know what is the value in your RDES3 value after the data is received?

Best Regards

Siddharth

Hello Siddharth,

Oh ok no problem.

RDES3 contained 0x30010048  which seems perfectly fine.

I performed some more investigation this morning:

• If I change my packet size to 72 bytes + FCS, I have one additional word of 32 bits (seems to be the FCS repeated twice)
• If I change my packet size to 76 bytes + FCS, I have no additional word
• If I change my packet size to 80 bytes + FCS, I have no additional word
• If I change my packet size to 84 bytes + FCS, I have two additional words of 32 bits (seems to be the last 32 bits word from the previous DMA transfer repeated twice)
• If I change the RX DMA maximum burst length to 1 (instead of 4), I don't have an additional 32 bits word in any of the conditions.

So it seems related to the fact that if the packet length + FCS is not fitting in the burst length, then there are additional words added. This doesn't seem to be documented, bug or normal behavior ?

My conclusion is that, I don't get an additional 32 bits word if:

• the packet size is one 32 bits word less than a multiple of the burst length (but a multiple of the burst length with the FCS)
• the packet size is a multiple of the burst length (FCS excluded)

Hope it helps,

Clément

Siddharth Deshpande,

So this issue I still encounter.

I sent the CCS project exports per private message.

Clément

Hello,

Any news on this topic ?

Regards,

Clément

Clément, 

I was able to reproduce the behavior that you are seeing.  

For now, you can use the RDES3  value to get the number of bytes received.

Best Regards

Siddharth

Siddharth,

Well not only, as the DMA goes beyond its allowed memory it means that if I have variables that starts right after my reception buffer their value will be overriden so wouldn't the recommendation be to set the RXPBL field from the Dma_Ch0_Rx_Control register to 1 ?

So if my understanding is correct, this is a bug in the peripheral ?

Best regards,

Clément