TMS320F28377D: Questions about EPWM frequency

Part Number: TMS320F28377D
Other Parts Discussed in Thread: LAUNCHXL-F28379D, TMDSCNCD28379D

Hi there. I'm using the ePWM function of 28377D. But the PWM frequency is far less than my expection. The system clock setting is shown below

InitSysPll(XTAL_OSC, IMULT_20, FMULT_0, PLLCLK_BY_2);

So the CPU frequency should be 20MHz*20/2=200MHz. Then I configure the period of ePWM to be 400 with up and down mode (the complete code is shown below), so I expect that the ePWM frequency should be 200MHz/400/2= 250kHz. However, the measured result is only aboud 100kHz.

void InitEPwm1Example()
{
    EPwm1Regs.TBPRD = 400;       // Set timer period 801 TBCLKs
    EPwm1Regs.TBPHS.bit.TBPHS = 0x0000;        // Phase is 0
    EPwm1Regs.TBCTR = 0x0000;                  // Clear counter

    EPwm1Regs.CMPA.bit.CMPA = EPWM1_MIN_CMPA;    // Set compare A value
    EPwm1Regs.CMPB.bit.CMPB = EPWM1_MAX_CMPB;    // Set Compare B value

    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up and down
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;       // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero
    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;            // Set PWM1A on event A, up
                                                  // count
    EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;          // Clear PWM1A on event A,
                                                  // down count

    EPwm1Regs.AQCTLB.bit.CBU = AQ_SET;            // Set PWM1B on event B, up
                                                  // count
    EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR;          // Clear PWM1B on event B,
}

Can you help me to solve this problem? I would appreciate it.