Other Parts Discussed in Thread: CONTROLSUITE, UCC28950, TIDM-02000
Hello.
Please tell me about the PWM setting of PSFB_VMC.
In the C28x digital power library, dead time is not described in the SR gate signal.
On the other hand, in the controlSUITE assembly macro, 10 is added as "Extra safety cycles".
As a result, the rise of the SR gate signal will be delayed a little like the yellow-painted part.
What kind of effect does it have? Is it dangerous with "0" setting?
In addition, the ucc28950 datasheet has the ability to delay the fall of the SR gate signal.
If this delay is small, it is the conduction loss of the SR diode.
If there are many, the reset of Lr is completed and we recognize that it is dangerous.
Is this delay setting not available when using the C28x Digital Power Library?
In C28x and ucc28950, active / passive_leg is replaced, so is it like this?
Best regards!PSFB_VMC_PWM.pdf