Other Parts Discussed in Thread: C2000WARE
Hello,
I am working with the DSP TMS320F28375D and have questions regarding flashing both CPUs.
In my application, both CPUs are flashed in advance with a custom bootloader before loading the main program.
Afterwards I use a Sitara controller which controls the loading of the main program to the Delfino as well as the booting.
The boot process of my application looks like this:
- The Sitara controller sends via BSIP data packets in .hex format to the CPU1 of the F28375D, which the CPU1 buffers in the GSRAM.
- Then the bootloader of CPU1 of the Delfino copies the data packets into its flash memory.
- After the .hex has been copied completely into the flash of CPU1, it remains in an idle state within the bootloader application until the Sitara gives the command to jump into the main program.
- In this main program the boot cpu2 from flash command is set by using the ipc module right at the beginning.
Currently I am unsure which is the best way to load my main program on CPU2.
In my configuration it is not intended to give the CPU2 control over GPIOs.
Therefore I can't send data packets directly through Sitara using BSIP.
What is the easiest way to load the main program for CPU2 into its flash memory as well?
Also, currently I use for both CPUs own CCS projects, which output a .hex-file each.
Is there a way to generate a single .hex from both projects?
Best Regards,
Viktor
