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TMS320F280049: Report Bit0 Error

Part Number: TMS320F280049


Hi team,

Here's an issue from the customer may need your help:

When debugging CAN transmission (crystal: INTOSC2, SysClock: 80 Mhz, Baud Rate: 125 K, ID: 0x0000, DLC = 0), In loopback mode, the message can be sent normally, but a Bit0 Error is always reported when it is working. The initialization procedure is modeled on the can_ex3_external_transmit routine. The Msg Objects sent in both modes is the 31st used. Also, both Tx and Rx on the hardware are disconnected (floating) from the outside world, so external causes can be excluded.

The waveform is as below:

The following screenshot shows the register value captured when entering a CAN Error Interrupt (Bit0 Error) in normal operating mode (bus-off is already the first time the error interrupt is entered):

Could you help check this case? Thanks.

Best Regards,

Cherry

  • Hi Cherry,

    First of all, when CAN communication is used we strongly discourage customers to use the internal oscillators as the main clock source as the accuracy of the internal oscillator may not be able to meet the clocking requirements of CAN.  This has been emphasized in the TRM as a note and maybe point this out to the customer.

    As for the bit0 error and bus off condition these conditions should not happen in loopback mode.  For the customer's code, can you please check if they have retained the below statement:

              CAN_enableTestMode(CANA_BASE, CAN_TEST_EXL);

    A bit0 error and a bus-off condition occurring at the instant the ISR is serviced is an indication that CAN is probably not in loopback mode.  A bit 0 error occurs when CAN needs to transmit a dominant '0' state but the bus is monitoring a recessive '1' state so somehow, it looks like external CAN connections are still involved in the code.  When enough errors occur (maybe a series of bit 0 errors happening due to unsuccessful re transmission attempts), the CAN module would isolate the bus by putting in in bus off state.  Again, these are indications that test is probably not in loopback mode.

    Regards,

    Joseph

  • Hi Joseph,

    Thanks for your help.

    They've tried 50K baud rate, and remain the same error.

    The program has called CAN_disableTestModule(CANA_BASE) before calling CAN_startModule(CANA_BASE) (that is, before entering normal operating mode).

    CAN_enableTestMode(CANA_BASE, CAN_TEST_EXL);

    No, they didn't retain this statement, which can also be seen from the register value CAN_CTL.TEST=0.

    Yes, the Tx waveform in loopback mode is normal and there is no bit0 error, the ISR error interrupt is entered in normal mode.

    The Tx waveform in the screenshot is not high for approximately 135 us after the first falling edge occurs (approximately 16 to 17 bittimes), so a bit0 error is reported.

    Why does this waveform occur as soon as it enters normal mode? In theory, the loopback mode test is OK, and this should also be transmitted properly because the TX is floating.

    Thanks and regards,

    Cherry

  • And the following is the code that has been removed from loopback mode. The problem is still as the same.

        // Initialize GPIO and configure GPIO pins for CANTX/CANRX on module A
        GPIO_setPinConfig(DEVICE_GPIO_CFG_CANRXA);
        GPIO_setPinConfig(DEVICE_GPIO_CFG_CANTXA);
        GPIO_setMasterCore(DEVICE_GPIO_PIN_CANRXA, GPIO_CORE_CPU1);
        GPIO_setMasterCore(DEVICE_GPIO_PIN_CANTXA, GPIO_CORE_CPU1);
        GPIO_setPadConfig(DEVICE_GPIO_PIN_CANRXA, GPIO_PIN_TYPE_PULLUP /*GPIO_PIN_TYPE_STD*/);  // for Rx pin is uncornnect.
        GPIO_setQualificationMode(DEVICE_GPIO_PIN_CANRXA, GPIO_QUAL_ASYNC);
        GPIO_setQualificationMode(DEVICE_GPIO_PIN_CANTXA, GPIO_QUAL_ASYNC);
    
        CAN_initModule(CANA_BASE);// Initialize the CAN controllers
    
        CAN_setBitRate(CANA_BASE, DEVICE_SYSCLK_FREQ, 50000, 20);// Set up the CAN bus bit rate to 50kHz.  CAN_Clock = 80M.  bitTime = 20(Tq)
    
        CAN_enableInterrupt(CANA_BASE, (CAN_INT_IE0 | CAN_INT_ERROR | CAN_INT_STATUS));// Enable interrupts on the CAN A peripheral.
    
        Interrupt_register(INT_CANA0, &CanAISR);// This registers the interrupt handler in PIE vector table.
    
        // Enable the CAN-A interrupt signal
        Interrupt_enable(INT_CANA0);
        CAN_enableGlobalInterrupt(CANA_BASE, CAN_GLOBAL_INT_CANINT0);
        
        CAN_clearInterruptStatus(CANA_BASE, 31);
        CAN_getStatus(CANA_BASE);
        CAN_setupMessageObject(CANA_BASE, 31, 0x0000, CAN_MSG_FRAME_STD, CAN_MSG_OBJ_TYPE_TX, 0, CAN_MSG_OBJ_NO_FLAGS, 0);
        CAN_clearGlobalInterruptStatus(CANA_BASE, CAN_GLOBAL_INT_CANINT0);
        
        CAN_startModule(CANA_BASE);// Start CAN module A operations
        
        uint16_t senddata[8] = {0};
        CAN_sendMessage(CANA_BASE, 31, 0, senddata);

  • Hi Cherry,

    Sorry, i'm trying to understand why customer is debugging the CAN issue by isolating the can module from the external CAN bus.  Is customer seeing bit0 error when when device is connected to the CAN bus through the transceiver and to debug this issue, customer then disconnects device from CAN bus, invokes loopback mode then run the test and everything proceeds with no error?  I think this is the case but please confirm.

    Anyway, in CAN communications, every time data is transmitted, the receiver side automatically checks what is intended to be transmitted.  Say a dominant bit (logic 0) goes out of the CAN TX pin, RX pin has to be dominant (logic 0) as well otherwise if RX sees logic 1, then CAN reports a bit 0 error.  If there is nothing wrong with the setup, RX should also be logic 0 in this case.  A quick way to check for a setup issue is to inspect the levels of RX with a scope as well.  The waveform you provided seems to be coming from TX pin.  Check for the waveform for the RX pin as well.  Signal might be stuck to logic 1 on RX pin and if this is the case that would be the reason for getting a bit 0 error (and thus would trigger a bus off condition).  There might be an issue on the transceiver or RX pin is just shorted to a high logic.

    Regards,

    Joseph