Part Number: TMS320F28386S
We are using default GPIO Boot Mode and both pins (GPIO72 and GPIO84) are set high. So the Boot Mode should be "Boot to Flash".
In OTP the GPREG's are all ones (default). But the flash is secured by DCSM OTP. The CPU2 and CM are not programmed. The program start in flash shall be default (0x80000). The linker option "entry_point" is set to code_start and we are using TI's f2838x_codestartbranch.asm with watchdog disabled.
After loading the program with JTAG it works fine. But after a power-cycle the PC stays in an address range which according to TRM means it is in "Wait Boot Mode".
Also the Flash configuration of the Blinky LED example does not boot after power-cycle.
My questions:
- Is it necessary to explicitly set the flash entry point (BOOTDEF) to 0x80000 and all other GPREG configurations in OTP register even if I want default boot mode?
- Have the CPU2 and CM to be booted or flashed too such that the CPU1 boots correctly?
- Can I use the "Flash Boot" option with secure flash or do I have to use "Secure Flash Boot"?
- What else could be the problem?
Thanks in advance for the answers.

