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C2000 F28035 Why does the PLL take so long to lock?



We are using a F2803x with internal oscillator. The PLL takes over 8ms to lock.  Why is this taking so long?!

 

 

  • Update, there is a PLLLOCKPRD register, with default of 0xFFFF.   Are there any app notes to know what value should be set here?  What happens if the period is too short, does it force a lock as soon as the period value expires?

     

  • Tom,

    No appnotes, but section 6.7.3 of the datasheet has a spec of 1ms maximum lock time and the following verbiage:

    The PLLLOCKPRD register must be updated based on the number of OSCCLK cycles. If the zero-pin internal oscillators (10 MHz) are

    used as the clock source, then the PLLLOCKPRD register must be written with a value of 10,000 (minimum).

    Hope this helps.

    Regards,
    Dave Foley

     

  • Awesome! Thanks!

  • Can you clarify one thing.  Does the PLLLOCKPRD have to expire before the lock flag is set, or is it possible that the PLL will lock BEFORE the expiration of this value??  Is the only purpose of this register to expire and set the lock flag?

     

  • The lock flag is set by the expiration of this counter. The PLL lock time is a characterized value and we guarantee it will lock before the time specified in the datasheet. It is possible for it to lock before the counter expires and the bit is set.

    Regards,
    Dave Foley

     

  • Thanks Dave, I'm a little confused by the comment:

    The comment "The lock flag is set by the expiration of this counter."   This implies that PLLLOCKPRD must expire.

    The comment "It is possible for it to lock before the counter expires and the bit is set."  contradicts the first comment.  I'm confused?!

    So, If I set the PLLLOCKPRD to 10000, but check lock, it will ONLY be set if the PLLLOCKPRD expires, OR is it possible to lock while the PLLLOCKPRD has only counted down half way.  Can you point me to the datasheet that clarifies this scenario. Thanks.

    Tom

     

  • My apologies for not explaining fully. The PLLLOCKPRD is loaded into an internal counter when you change the PLLCR. This counter counts down and sets the lock bit. The counter nor the PLLLOCKPRD actually affects the PLL. The true PLL lock time is determined by the physics of the chip.

    Regards,
    Dave Foley