Other Parts Discussed in Thread: C2000WARE
Hello,
Does anyone know if it is possible to send the EtherCAT SOF or EOF signal to a GPIO pin? Any help would be appreciated.
Regards,
Jeff
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Hello,
Does anyone know if it is possible to send the EtherCAT SOF or EOF signal to a GPIO pin? Any help would be appreciated.
Regards,
Jeff
Hi Jeff,
Section 31.2.9 'General Purpose Inputs and Outputs' of the F2838x TRM (SPRUII0) has this info.
The EoF signal has the direct functionality mentioned below to ECAT_outputs.

The SoF doesn't have this direct functionality, but it can be accessed using the CLB (i.e. route SoF to a CLB tile and then bring to a XBAR output).

Best,
Kevin
Kevin,
Thanks for the feedback. I did see the EOF frame but I am having issues configuring the processor for this functionality.
Regards,
Jeff
Hi Jeff,
I am having issues configuring the processor for this functionality.
By the above you mean configuring the device to bring the signal out of the device to a GPIO, correct? I will look into how you are meant to configure in SW if so.
Best,
Kevin
Hi Jeff,
I believe the registers shown in the diagram below need to be configured to bring the EoF signal out to a GPIO, in addition to enabling a respective ESC_GPOn pin (like is done in 'f2838x_cpu1_allocate_ecat_to_cm' project).

There are driverLib functions & defines for configuring these registers in 'escss.c' and 'escss.h' files, such as ESCSS_enableGPOUT() function.
Best,
Kevin
Hello Jeff, Kevin,
This path(shown above in Fig 31-12) is meant for PDI_GPO outputs to be directly sent out on to GPIO or synchronize the output with the occurrence of one of the selected signals like EOF or SYNC as programmed.
These signals ECAT_SOF and ECAT_EOF are connected to CLB (Configurable Logic Tile) Tile5 - 6 Global mux inputs. These can then be routed outside on to GPIO's via CLB O/P X-BAR.
Hope this is clear.
Thanks all for helping Jeff and others in this case who may be/have asked this same question before or in the future. In speaking with Jeff today, we both agree that what might be helpful in the future, is a certain C2000Ware CLB project example specifically for this use-case vs. the current internal IO CLB example that exists today. In fact, if this new CLB example project could utilize an internal counter or timer or PWM (instead of simply IO) that then brings it out to an external GPIO, that would be ideal. This would then follow the above graphic illustration noted by Kevin quite perfectly.
Just a thought...thanks again.
Regards,
Chris
Thanks Chris, it's a good suggestion to demonstrate the usage/support in a SW example. For my own understanding, what is the reason / use-case for needing to bring-out the SoF and EoF signal to a device pin?
In fact, if this new CLB example project could utilize an internal counter or timer or PWM (instead of simply IO) that then brings it out to an external GPIO, that would be ideal.
Can you elaborate on the above case as well for me? The SoF/EoF signal is not directly needed at a device pin, or something else?
Best,
Kevin
I added the EOF and SOF to the CLB and it is working. We are using these in conjunction with other signals to check timing. Thanks again for the help.
Regards,
Jeff
Hi Jeff,
Good to hear and happy to help. Thanks for the update and additional info.
Best,
Kevin