C2000 F28004x FSI Module Questions

Let me get this to the designer of the C2000-F28004X-POWER-EST-CALC.

Hi,Kevin

Thank you for your answer

For some other questions:

1. Does Ping watchdog interrupt detection work throughout the communication process? How does it work?

2. No specific time parameters have been found for the synchronization jitter of FSI. Is there relevant test data? In the document (using the fast serial interface (FSI) with multiple devices in an application), there are only time parameters about transmission speed and transmission time;

3. FSI is a full duplex communication mode. When will the local data be put on after the node in servo application control receives the data through RX? Or does the node need to wait for the end of reception before forwarding data?

4. How to distinguish the data of different nodes? How do nodes identify their own data? Is there a document for data protocol that users can refer to?

Hi Hui,

Hui Chen said:

1. Does Ping watchdog interrupt detection work throughout the communication process? How does it work?

Yes, it's basically a timer that gets reset anytime an FSI frame is received. If no FSI frame is received and the timer counts down to zero then an interrupt / flag will be triggered indicating something went wrong (i.e. link may be bad). This watchdog feature can actually work for any kind of FSI frames, not just Ping Frames.

Hui Chen said:

2. No specific time parameters have been found for the synchronization jitter of FSI. Is there relevant test data? In the document (using the fast serial interface (FSI) with multiple devices in an application), there are only time parameters about transmission speed and transmission time;

There is jitter waveform test data for 2 Node and 8 Node typologies provided in the document. See 'Experimental Results' of respective sections.

Hui Chen said:

3. FSI is a full duplex communication mode. When will the local data be put on after the node in servo application control receives the data through RX? Or does the node need to wait for the end of reception before forwarding data?

FSI modules can receive and transmit at the same time. However if you're wanting to forward the received data to the next device in a daisy-chain connection, then the full FSI frame will need to be received first.

Hui Chen said:

4. How to distinguish the data of different nodes? How do nodes identify their own data? Is there a document for data protocol that users can refer to?

The Frame Tag and User Data portions of the FSI frame are intended to be used for addressing / identification. FSI on newer devices like F2838x, F28002x, & F28003x have built in Tag Matching functionalities (notification only). The newest F28003x device actually has User Data Filtering mechanisms as well (i.e. can be configured to only receive frames based on received UDATA value).

Best,

Kevin

Hi,Kevin

Thank you for your answer!

How to confirm the counter "match" value of CLB module when using? Finally, correctly output EPWM synchronization data signal;

Hi Hui,

Hui Chen said:

How to confirm the counter "match" value of CLB module when using?

Good question, but I don't have the greatest answer right now.

In the testing for the App Note we set the CLB counter match values of each node device through trial-and-error while scoping the ePWM signals, until we saw they were aligned and in-sync with the Lead device ePWM on the oscilloscope. In a real system you would need a software routine to calibrate the match value, which would involve measuring the time delay it takes for the FSI ping frame to reach each device in the daisy-chain connection (could use CPU timer, CLB, or something else for this). Then set the CLB counter match values based on these measured delays. Each CLB counter match increment would add some discrete delay, 10ns I believe depending on device SYSCLK.

Hui Chen said:

Finally, correctly output EPWM synchronization data signal;

Can you elaborate on this question? Are you asking about how to bring the CLB generated sync signal out of the device, or something else?

Best,

Kevin

Hi,Kevin

Thank you for your answer!

"Finally, correctly output EPWM synchronization data signal;"This should be that the CLB module outputs a flag bit to the PWM output module after the counter is full.

If I need to change the number of nodes or connection topology during use, do I need to recalculate the value of "match" with the software routine?

Best,

Hi,Kevin