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TMS320F2812: CS2# stays low after few transactions on booting

Emil Zacharia George
Prodigy 20 points

Part Number: TMS320F2812

Hi TI Support Team,

We have interfaced the TMS320F2812 RT MCU with an external SRAM and an FPGA. The FPGA is programmed to function as a DPRAM using another SAM9G20 processor.

The CS0&1#, CS2#, CS6&7# are all connected from the FPGA to the C2000 RT MCU.

As the boot progresses, the CS2# gets to low state after few transactions. What could be the probable issue?

Thanks.

Emil

  • 0
    TI__Guru* 95315 points

    Emil,

                    I presume this post is related to this post. 

    Your schematics does not show all the connections between the F2812 and the FPGA/SRAM. I have sent you a friendship request to enable you to privately share the schematics with me without having to post it on the forum.

    For -XZCS2, the datasheet says " XINTF Zone 2 Chip Select. XZCS2 is active (low) when an access to the XINTF Zone 2 is performed." Does your code perform any access to this zone? That is the only way a CS signal will be driven low.