• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 82 subscribers
  • Views 542 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379D: CLB Clock and ePWM

Irene Boben
Expert 1030 points
Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE, SYSCONFIG

Hi Team,

I understand that CLB clock for this processor comes from ePWM clock. Therefore before setting any of the CLB registers I enabled ePWM clock as below.

EALLOW;

// Enabling ePWM Clock corresponding to CLB tile 1
CpuSysRegs.PCLKCR2.bit.EPWM1 = 1;
Clb1LogicCtrlRegs.CLB_LOAD_EN.bit.GLOBAL_EN = 1;/* Enabling CLB tile 1 */

.....

However, the registers where not getting set and it was always 0. On inspection it was seen that, CPU has to be selected for ePWM1 by setting the DevCfgRegs.CPUSEL0.bit.EPWM1 bit and only then CLB registers get set.

Is this expected?

So my question is: Is there a limitation that CLB and the corresponding ePWM from which it derives clock should be on the same CPU? 

Can I have a scenario where I configure CLB tile 1 in CPU1 and ePWM1 in CPU2?

Kind regards,

Irene

  • 0
    TI__Guru 52040 points

    In this device specifically EPWM1 and CLB go togther. Not only that when HRPWM is needed, EPWM1 needs to be assigned to CPU1. So in general, for this device you need to keep EPWM1 and CLB on CPU1.

    With that said, the finding is correct. However by default at start EPWM1 is assigned to CPU1, had you changed it? Only if you had explicitly changed the EPWM1 owner to CPU2, you would have to have the line of code setting the owner to CPU1.

    Also I see that you set the CLB global enable bit before intiializating the CLB, you can set that after the tile init is completed. That way the HLC and counters don't start running the moment they are set up.

  • 0 in reply to Nima Eskandari
    Expert 1030 points

    Hi Nima,

    To understand correctly, can we not use CLB in CPU2 in F2837xD even if we do not need HRPWM?

    You are right I had changed ePWM owner to CPU2 and therefore needed to set it back to CPU1. 

    Also the reason I did global enable before initializing CLB was because it was the sequence followed in the first clb example in C2000Ware. In almost all the example, CLB global enable is set before init_tile function is called.

    So the ideal way of setting up would be:

    1. Set up CLB Logic config

    2. Call CLB Init_tile() function from clb_config.h

    3. Set CLB global enable

    Kind regards,

    Irene

  • +1 in reply to Irene Boben
    TI__Guru 52040 points

    Irene,

    So technically you should be able to use the CLB on CPU2 as long as you are okay assigning EPWM1 to CPU2.

    For the example, you are correct, I did just look at them and they do follow that sequence which is FINE most of the time. BUT the recommended pattern is the one I sent you and the one that SysConfig follows. All of the examples are fine because the example doesnt really need the counters/hlc to start at the same time.

    Nima