This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377S: using SCI for communication, the baud rate is more than 1m, and the error rate during communication is relatively high

Part Number: TMS320F28377S


Hello,

My question is: when using TMS320F28377SPZP to test SCI communication, the baud rate used is 2.5m (I have tried in the case of 1m to 5m, and there is the same problem). The upper computer sends 3 bytes of data, the header is 0x55, and the last two are data greater than 0x80. It often shows that the received data header is correct, The last two errors (0x55 is received correctly, the last two numbers are wrong, and the number less than 0x80 will appear. Most of the last two numbers are received as 0x00. For example, the upper computer sends 0x55,0x9f and 0xff, then sends 0x55,0xaf and 0xaf after an interval of 32us, and then sends 0x55,0xbf and 0xbf at an interval of 32us). These three strings of data are sent in a circular manner. After a period of time, the receiving end of 28377 will appear that the received data is 0x55,0x00,0x00, These three numbers (other numbers will appear in the last two, such as 0x46,0x01, mostly 0x00), and the value of scirxbuf is 0xc0cc.

  • Depeng,

    The subject matter expert is currently out of the office, please expect a reply  by Monday end of day.

    Best,

    Matthew

  • Hi Depeng,

    For long communication cables on unclocked communications like UART, this is relatively common to have issues at higher baud rates. But it is possible this is SW/FIFO related.  

    There are two things to try to determine if cause is cable length or SW:

    1. Please try putting a 1 bit delay when transmitting to C2000 SCI-RX (put delay on the other device) after each time the C2000 FIFO would get an interrupt. For example if the RX-FIFO is set to trigger an interrupt at 3 bytes, then the other device must wait 1 bit between packets of 3 bytes. This is a limitation of the SCI-RXFIFO interrupt latency and is not dependent on baud rate  

    2. if the above doesn’t correct the issue, please take a scope capture of the RX line during failure. It is possible the parasitics of the wire is causing enough distortion of the bits to cause bad detection. If it looks problematic try slowing down the baud rate and seeing if it corrects it. If it does, then some things can be done to improve the UART wires (though really long cables will have issues even with best of fixes):

    A. Twisted pair cable instead of non twisted pair.

    B. Ferrite beads for the estimated comm speed and slew.

    Regards,

    Vince