TMS320F280049C: ePWM Variable Duty Cycle

Another thing I am confused on is how to alter the second and third epwm so their phase are 120 and 240 degrees  apart. From example 11, there is a configure signal function but I believe it will interfere with the duty cycles assigned in the updateCompare function I am currently using.

Hi Matthew,

Matthew Black said:

And could you point me towards a resource in calculating what increments of theta need to be selected to implement the 14400 Hz switching frequency?

I have assigned this thread to Aditya to help continue support your initial thread, and answer the questions about the theta calculations.

Matthew Black said:

What is the default clock speed for the ePWM interrupt routine?

The particular example you are using has the following code for setting up the EPWM interrupt:

    // Interrupt where we will change the Compare Values
    // Select INT on Time base counter zero event,
    // Enable INT, generate INT on 3rd event
    //
    EPWM_setInterruptSource(myEPWM1_BASE, EPWM_INT_TBCTR_ZERO);
    EPWM_enableInterrupt(myEPWM1_BASE);
    EPWM_setInterruptEventCount(myEPWM1_BASE, 3U);

This means that every third time the time-base counter is equal to zero, the EPWM interrupt will occur. If you want this to happen more frequently then you can change this to be every time the time-base counter is equal to zero and therefor have your ISR frequency match the frequency of your EPWM output.

Matthew Black said:

The example 2 epwm_updown_aq updates the CMPA register with compAValue which increments to 1950 and decrements to 50. Why is it that 2000 is considered a 100% duty cycle?

Did you run the code with the comparator value at 2000? Where you seeing 100% duty cycle?

Matthew Black said:

how to alter the second and third epwm so their phase are 120 and 240 degrees  apart. From example 11, there is a configure signal function but I believe it will interfere with the duty cycles assigned in the updateCompare function I am currently using.

Correct, you'll want to use the functions that map to setting up the synchronization scheme and the phase shift values.

Please take a look at this thread which has an example for how to set this up:

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1078925/tms320f28388d-examplw-epwm_ex3_synchronization-c/3998071?tisearch=e2e-sitesearch&keymatch=epwm_ex3_synchronization#3998071 

We also recently released a video that talks about the steps required to setup the synchronization/phase shifts:

https://training.ti.com/c2000-enhanced-pulse-width-modulator-epwm-time-base-submodule?context=1137766-1149551-1149545 

Best Regards,

Marlyn

Hello Aditya,

Thank you for your assistance. This code will be used for a 400 Hz inverter, so I will be needing to use theta to create duty cycles representing the expected sinusoidal voltage. AS of now, I have a 6 element float array containing 6 theta values, in radians, to take the sin of and multiply it by the compAValue when compAValue reaches the maximum counter value. The array indexes up to pi/2, then back down to 0 and repeats. No negative values will be used because the input voltage to the inverter is floating, so a 50% duty cycle will represent where the sin wave crosses the origin.

I also changed the ePWMs to only be in up-count mode.

Here is the updated 'updateCompare' function if you could let me know if this is the correct way to go about this.

void updateCompare(epwmInformation *epwmInfo)
{
uint16_t compAValue;
float32_t theta[6] = {0, 0.314159, 0.628319, 0.942478, 1.25664, 1.5708};
float32_t x;
uint16_t count = 0;
bool posDirection = true;

compAValue = EPWM_getCounterCompareValue(epwmInfo->epwmModule,
EPWM_COUNTER_COMPARE_A);

//
// If we were increasing CMPA, check to see if we reached the max
// value. If not, increase CMPA else, change directions and decrease
// CMPA
//
x = sin(theta[count]);

if(compAValue == EPWM1_MAX_CMPA)
{

if(posDirection)
{
EPWM_setCounterCompareValue(epwmInfo->epwmModule,
EPWM_COUNTER_COMPARE_A,
compAValue*x);
count++;
if(count == 6)
{
posDirection = false;
count = 5;
}
}
else
{
EPWM_setCounterCompareValue(epwmInfo->epwmModule,
EPWM_COUNTER_COMPARE_A,
compAValue*x);
count--;
if(count == 0)
{
posDirection = true;
}
}
compAValue = 0U;
}

compAValue++;

}

Thanks,

Matthew

Hello Aditya,

I have updated my program to include the 36 element array for the sinusoidal values, the previous array of 6 was for one quadrant and was based on some early calculations of sample rate per quadrant. I still have something that is confusing to me: is the ePWMCLK default set to 10MHz? I've seen in the data sheet and user manual it can be a number of values, but I am assuming that is all from using the clock dividers, so if I chose HSPCLKDIV = 4 and CLKDIV = 1, the TBCLK will be 2.5 MHz? 

Here is my revised code, along with parameters in the sysconfig file. When the output is read on an oscilloscope, it initially shows one duty cycle of about 50% with incorrect phase spacing between the channels.

//
// Included Files
//
#include "driverlib.h"
#include "device.h"
#include "board.h"

//
// Defines
// Calculations for TBPRD
#define EPWM1_TIMER_TBPRD 172U //using hspclkdiv = 4, clkdiv = 1
#define EPWM1_MAX_CMPA 170U //TBCLK = 10MHz/4*1 = 2.5MHz, T_PWM = 1/14400Hz = 69.44 usec
//T_TBCLK = 400 nsec
//TBPRD = (T_PWM/T_TBCLK) - 1 = 172
#define EPWM2_TIMER_TBPRD 172U
#define EPWM2_MAX_CMPA 170U

#define EPWM3_TIMER_TBPRD 172U
#define EPWM3_MAX_CMPA 170U

#define EPWM_CMP_UP 1U

//
// Globals
//
typedef struct
{
uint32_t epwmModule;
uint16_t epwmCompADirection;
uint16_t epwmTimerIntCount;
uint16_t epwmMaxCompA;
}epwmInformation;

//
// Globals to hold the ePWM information used in this example
//
epwmInformation epwm1Info;
epwmInformation epwm2Info;
epwmInformation epwm3Info;

//
// Function Prototypes
//
void initEPWM1(void);
void initEPWM2(void);
void initEPWM3(void);
__interrupt void epwm1ISR(void);
__interrupt void epwm2ISR(void);
__interrupt void epwm3ISR(void);
void updateCompare(epwmInformation *epwmInfo);

//
// Main
//
void main(void)
{
//
// Initialize device clock and peripherals
//
Device_init();

//
// Disable pin locks and enable internal pull ups.
//
Device_initGPIO();

//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
Interrupt_initModule();

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
Interrupt_initVectorTable();

//
// Assign the interrupt service routines to ePWM interrupts
//
Interrupt_register(INT_EPWM1, &epwm1ISR);
Interrupt_register(INT_EPWM2, &epwm2ISR);
Interrupt_register(INT_EPWM3, &epwm3ISR);

//
// Disable sync(Freeze clock to PWM as well)
//
SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

//
// Configure GPIO0/1 , GPIO2/3 and GPIO4/5 as ePWM1A/1B, ePWM2A/2B and
// ePWM3A/3B pins respectively
// Configure EPWM Modules
//
Board_init();

initEPWM1();
initEPWM2();
initEPWM3();

//
// Initialize ePWM2 with phase shift of 120 deg
// 172*120/180 = 115
//
EPWM_selectPeriodLoadEvent(myEPWM2_BASE, EPWM_SHADOW_LOAD_MODE_SYNC);
EPWM_setPhaseShift(myEPWM2_BASE, 115);

//
// Initialize ePWM2 with phase shift of
//
EPWM_selectPeriodLoadEvent(myEPWM3_BASE, EPWM_SHADOW_LOAD_MODE_SYNC);
EPWM_setPhaseShift(myEPWM3_BASE, 230);

//
// ePWM1 SYNCO is generated on CTR=0
//
EPWM_setSyncOutPulseMode(myEPWM1_BASE,EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
EPWM_setSyncOutPulseMode(myEPWM2_BASE, EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN);
EPWM_setSyncOutPulseMode(myEPWM3_BASE, EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN);

EPWM_enablePhaseShiftLoad(myEPWM2_BASE);
EPWM_enablePhaseShiftLoad(myEPWM3_BASE);

//
// Enable sync and clock to PWM
//
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

//
// Enable ePWM interrupts
//
Interrupt_enable(INT_EPWM1);
Interrupt_enable(INT_EPWM2);
Interrupt_enable(INT_EPWM3);

//
//Set interrupt to occur every time TBCLK = 0
//
EPWM_setInterruptEventCount(myEPWM1_BASE, 1U);
EPWM_setInterruptEventCount(myEPWM2_BASE, 1U);
EPWM_setInterruptEventCount(myEPWM3_BASE, 1U);

//
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
//
EINT;
ERTM;

//
// IDLE loop. Just sit and loop forever (optional):
//
for(;;)
{
NOP;
}
}

//
// epwm1ISR - ePWM 1 ISR
//
__interrupt void epwm1ISR(void)
{
//
// Update the CMPA and CMPB values
//
updateCompare(&epwm1Info);

//
// Clear INT flag for this timer
//
EPWM_clearEventTriggerInterruptFlag(myEPWM1_BASE);

//
// Acknowledge interrupt group
//
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP3);
}

//
// epwm2ISR - ePWM 2 ISR
//
__interrupt void epwm2ISR(void)
{
//
// Update the CMPA and CMPB values
//
updateCompare(&epwm2Info);

//
// Clear INT flag for this timer
//
EPWM_clearEventTriggerInterruptFlag(myEPWM2_BASE);

//
// Acknowledge interrupt group
//
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP3);
}

//
// epwm3ISR - ePWM 3 ISR
//
__interrupt void epwm3ISR(void)
{
//
// Update the CMPA and CMPB values
//
updateCompare(&epwm3Info);

//
// Clear INT flag for this timer
//
EPWM_clearEventTriggerInterruptFlag(myEPWM3_BASE);

//
// Acknowledge interrupt group
//
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP3);
}

//
// initEPWM1 - Configure ePWM1
//
void initEPWM1()
{
epwm1Info.epwmCompADirection = EPWM_CMP_UP;
epwm1Info.epwmTimerIntCount = 0U;
epwm1Info.epwmModule = myEPWM1_BASE;
epwm1Info.epwmMaxCompA = EPWM1_MAX_CMPA;

}

//
// initEPWM2 - Configure ePWM2
//
void initEPWM2()
{
epwm2Info.epwmCompADirection = EPWM_CMP_UP;
epwm2Info.epwmTimerIntCount = 0U;
epwm2Info.epwmModule = myEPWM2_BASE;
epwm2Info.epwmMaxCompA = EPWM2_MAX_CMPA;
}

//
// initEPWM3 - Configure ePWM3
//
void initEPWM3(void)
{
epwm3Info.epwmCompADirection = EPWM_CMP_UP;
epwm3Info.epwmTimerIntCount = 0U;
epwm3Info.epwmModule = myEPWM3_BASE;
epwm3Info.epwmMaxCompA = EPWM3_MAX_CMPA;
}

//
// updateCompare - Function to update the frequency
//
void updateCompare(epwmInformation *epwmInfo)
{
uint16_t compAValue;

//
//A floating voltage is being used as a power supply, so we have a 0.5 duty cycle represents AC 0 Volts
//
float32_t theta[36] = {0.5, 0.589278, 0.675687, 0.756449, 0.828969, 0.890915,
0.940297, 0.975528, 0.995475, 0.999497, 0.987464, 0.959765,
0.917288, 0.861399, 0.793895, 0.716945, 0.633022, 0.544823, 0.499497,
0.495475, 0.475528, 0.440297, 0.390915, 0.328969, 0.256449, 0.175687,
0.0892783, 0, 0.044823, 0.133022, 0.216945, 0.293895, 0.361399, 0.417288,
0.459765, 0.487464};
uint16_t count = 0U;

compAValue = EPWM_getCounterCompareValue(epwmInfo->epwmModule,
EPWM_COUNTER_COMPARE_A);

//
// Increase CMPA until Max CMPA is reached, update duty cycle, increase counter for sine value
//

if(compAValue == EPWM1_MAX_CMPA)
{
EPWM_setCounterCompareValue(epwmInfo->epwmModule,
EPWM_COUNTER_COMPARE_A,
EPWM1_MAX_CMPA*theta[count]);
count++;
if(count == 36)
{
count = 0;
}
compAValue = 0U;
}

compAValue++;

}

Thank you for all of your assistance,

Matthew

Hello Aditya,

I went through the training video and it was very helpful in calculating the TBPRD and TBPHS values. I set both of those using functions in my .c program file and the sysconfig gui (let me know if that is good practice or not). After confirming the device is default set to run on the sysclk at 100 MHz, I updated corresponding values of EPWMx_Timer_TBPRD to 1735. I removed the code and gui settings for the phase shift to focus on obtaining the desired pwm frequency first, but still read on the oscilloscope a ~1 sec pulse of a 50% duty cycle and a 4kHz frequency, and then a constant high output voltage after the 1 second pulse. Also for some reason it still seems the EPWM3 output leads by about 69 usec even after removing the phase shifts. 

Thanks,

Matthew